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The application of SiN/SiCxN stack as capping layer of damascene Cu/ULK interconnect was discussed. The stack film of ultra-thin SiN+SiCxN Cu capping films were fabricated by plasma enhanced chemical vapor deposition (PECVD) method, which consisted of ultra-thin SiN as barrier and SiCxN as etch stop layer. The resistance and capacitance of Cu/ULK and the capping film SIN/SiCxN was measured by regular...
Impacts of k-value reduction on LSI performances are clarified quantitatively using 2M-gate net-list. Reduction in k-value from 3.0 to 2.5 for M2-M5 interconnect layers achieves 11%-drop in interconnect parasitic capacitance (Cint) and 8.4%-reduction in propagation delay (τd), which also shrinks the effective variability of τd to improve LSI operation margins. From a viewpoint of BEOL fabrication...
Si-SiO2 multilayer nanoscale structures were obtained using a procedures of alpha-Si:H thin film depositions and subsequently plasma enhanced oxidation. Thus, a structure containing 6 layers of alpha-Si:H with thickness of 50 Aring, inserted between the layers of SiO2 with thickness 150 Aring has been created. The experimental setup with source of wide aperture and high-density inductively coupled...
Damage-less full molecular-pore-stack SiOCH (MPS) / Cu interconnect is developed to reduce effective k-value (keff). MPS with high endurance against plasma processes is introduced into both via and trench dielectrics without hard mask (HM). Low friction slurry and chemical modification of MPS surface by He-plasma treatment suppress defect generation during direct CMP of the MPS surface. The full-MPS...
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