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A wideband tunable divide-by-4 is designed and realized in 28nm bulk CMOS. A systematic design methodology to maximize the locking range over power consumption ratio is proposed. The test chip core area is only 25.6×24.8μm2 and measurements repeated over several samples demonstrate an operating frequency range from 25GHz to 102GHz with a maximum power consumption of 5.64mW from a 0.9V supply. The...
Frequency dividers are one of the most significant blocks in Millimeter-wave communication systems and became a research hotspot in recent years. In this paper, an 8:1 static divider is implemented in 0.13-μm CMOS technology. The realized static divider achieved a measured performance of 34 GHz maximum operating frequency with 0 dBm input power and consumes 14.5 mA current from 1.2 V power supply...
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