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This paper presents an overview of the Fault Simulation methods starting from the late 80's until present. In the following chapters a comparison is presented related to Fault Simulation in terms of Behavioral Models.
This paper present an overview of the Functional Simulation methods starting from the late 90's until present. In the following chapters the evolution of Functional Simulation methodology due to increasing design complexity is presented.
This paper describes a new method of random access memory faults description using VHDL language. The fault injection technique, which uses behavioral synthesis VHDL descriptions, is proposed. The injection can be easily automated for memory test algorithms verification using only VHDL language and standard simulation software. No other applications and simulation tools are needed.
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