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This paper presents the design of an output-capacitor-free cascode low-dropout regulator (LDR) with low quiescent current and high power supply rejection (PSR) over a wide range of frequency. In the proposed LDR topology, power NMOS transistors are cascoded to isolate the core regulator from power supply ripples, thus providing high PSR even without any external filtering capacitors. By biasing the...
A high-precision low-voltage adaptively biased (AB) low-dropout regulator (LDR) with extended loop bandwidth is proposed. The multistage output-capacitor-free LDR is stabilized by Miller compensation and Q-reduction techniques to reduce the required minimum load current. Adaptive biasing is achieved by using direct current feedback from a simple current mirror. The dynamics of both the main feedback...
Combining the supply ripple subtraction and high-pass filtering can improve the power supply rejection (PSR) over wideband frequency of low dropout regulator (LDO). The proposed LDO is fabricated by TSMC 0.35 ??m 2-poly 4-metal CMOS process. The simulation results at maximum load current of 100 mA, show that PSR at 10 k, 100 k and 1 M are -72 dB, -75 dB and -46 dB, respectively. Therefore, it's well...
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