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The scaling of the CMOS technologies has a great impact on analog deign. The most severe consequence is a reduction of supply voltage. In this paper, sampled sinusoidal switched current oscillator (SSIO), which operates at 1.8 V supply voltage is discussed. The proposed circuit has the simpler configuration and hence fewer transistors and connections, and faster building up of the stable oscillation...
With technology scaling, vulnerability to soft errors in random logic is increasing. There is a need for on-line error detection and protection for logic gates even at sea level. The error checker is the key element for an on-line detection mechanism. We compare three different checkers for error detection from the point of view of area, power and false error detection rates. We find that the double...
A delay-locked loop of multi-band selector with wide-locking range and low power dissipation is presented. The architecture of the proposed delay-locked loop consists of phase frequency detector, charge pump, band selector, multi-control delay line, and start-up circuit. The multi-band selector is used to extend operation frequency of delay-locked loop by switching the multi-control delay line. The...
A general scheme for the VLSI implementation of wavelet transform using switched-current (SI) circuits is firstly presented in this paper. SI circuits are well suited for this application since the dilation constant across different scales of the transform can be precisely implemented and controlled by both the transconductance (W/L) ratios and the clock frequency. The circuits are composed of analog...
A charge pump circuit has been developed that can deliver high currents even for a system supply voltage of 3 V. The circuit consists of capacitances, connected by MOS switches. The influence of the on-resistance of the switches on the circuit's output resistance has been analysed. The switches are implemented by PMOS transistors. The source bulk potential of these transistors is kept constant to...
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