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In this work, the lateral InGaAs tunnel FET is configured and sized to enable gate control of the Zener (reverse bias) tunneling current. The p+InGaAs transistor channel is 4 nm thick with a n+p+ source injector and a thin 3/3 nm HfO2/Al2O3 high-k gate dielectric. Atomic-layer deposition (ALD) is used to deposit the gate dielectric.
In this letter, we report the fabrication and characterization of self-aligned inversion-type enhancement-mode In0.53Ga0.47As metal-oxide-semiconductor field-effect transistors (MOSFETs). The In0.53Ga0.47As surface was passivated by atomic layer deposition of a 2.5-nm-thick AIN interfacial layer. In0.53Ga0.47As MOS capacitors showed an excellent frequency dispersion behavior. A maximum drive current...
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