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Power consumption becomes a very important criterion for the portable embedded devices and, therefore, many Dynamic Voltage/Frequency Scaling (DVFS) techniques have been introduced. This paper is trying to break down and analyze the power consumed by three main components, DSP logic, local memory, and the external DDR2, of a multi-core SoC platform. There are four configurations for this SoC platform:...
Energy consumption has become an increasingly design issue in multimedia mobile system. This paper presents a realization for suspend/resume on a dual-core SoC to conserve energy consumption while system is idle.A generic backup/restore mechanism is proposed for any DSP applications. Furthermore, optimization for latency targets on characteristic of H.264/AVC decoder is refined and only needs to backup...
To deal with nowaday multi-standard audio and video processing, a heterogeneous multi-core SOC architecture is presented in this paper, which is composed of a general purpose RISC processor, an audio processing enhanced DSP and dedicated video processing accelerators. To exploit the task level concurrency among audio-video media decoding, an efficiency and flexible HW/SW cooperating architecture is...
The emergence of high-definition video into mainstream applications has imposed a challenge to researchers and engineers in the field: achieving optimal balance between programmability and hardware efficiency. The DM6467 System-on-Chip (SOC) from Texas Instruments provides both DSP-like design flexibility and ASIC-like performance at the same time for codec designs. In this paper, we investigate how...
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