The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Package lid is usually mounted above the integrated circuits (ICs) to protect the die and improve the thermal performance. However, the package lid may be an unintentional radiation contributor due to the resonance of package lid and package substrate. In this paper, based on a typical wire-bonded ball grid array (WB-BGA) package, perfect magnetic conductor (PMC) packaging is used to suppress the...
Mobile and IoT(Internet of Things) applications require semiconductor packages with increasingly smaller form factor and higher performance, but still at low cost. This paper introduces various laminate based package substrates developed to serve these applications: ETS(Embedded Trace Substrate); ETPS(Embedded Trace and Passive Substrate); cavity substrate; high stiffness, low warpage thin substrate(80μm);...
In this paper, an embedded passive and active package is developed by using silicon substrates. Embedded passives are integrated on the silicon substrate or laminated organic using thin-film processes, and active devices are embedded in the silicon using cavity structures. Organic lamination processes are used for filling the gap between IC and silicon and also, it is possible to realize thick insulation...
A new additive ultra-thin chip fabrication process is presented, utilizing an array of vertical anchors that mechanically connect silicon membrane chips to a standard silicon wafer. The process is demonstrated down to 8 μm silicon chip thickness, with a chip thickness control better than ±0.2 μm and a surface topography with average roughness <; 7 nm. Such pre-processed wafers can be used for CMOS...
This paper presents for the first time a novel manufacturing-compatible organic substrate and interconnect technology using ultra-thin chip-last embedded active and passive components for digital, analog, MEMS, RF, microwave and millimeter wave applications. The architecture of the platform consists of a low-CTE thin core and minimum number of thin build up organic dielectric and conductive layers...
This paper presents the implementation of a front-end-module (FEM) for wireless Local Area Network (W-LAN) by embedding a power amplifier module (PAM) and a double-pole-double-throw (DPDT) switch IC in printed-circuit-board (PCB) by sequential build up process using polymers. Polymers are adopted as substrates and these substrates are composed of FR4 and Ajinomoto-bonding-film (ABF). Vacuum lamination...
The power consumption and the matching will be the principal issues at the 32 nm node and below. In this context, Ultra-Thin Body devices are extensively studied for the end-of-roadmap CMOS. In this paper we present the SON technology, leading to the simple fabrication of sustained mono-Si nano-membranes over an empty tunnel, and discuss on the application of this process to build-up electronic devices...
In this paper, the substrate integrated waveguide (SIW) cavity resonator is proposed. The coupling between SIW cavity and microstrip line is achieved by the electric field at the vertical center plane along the propagation direction. Unlike the conventional cavity coupling structure that shows absorption characteristics at the resonant frequency, it can be easily integrated into planar form. The cavity...
A novel compact coupled planar resonator (CCPR) based VCO (voltage controlled oscillator) using mode-coupling technique was developed in response to expensive high Ceramic and SAW resonators based signal source for wireless communications. One of the problems related to the conventional Ceramic/SAW based resonators (with high Q and low phase noise) is the challenge for integration in IC form. Instead...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.