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Besides well-known CPU based architectures, the so-called accelerators (GPU, DSP, FPGA) are about to gain ground in everyday programming, computing tasks. However, programming such computation units is quite different from traditional programming for CPUs,, special skills are required from the developers. In this paper we present techniques, tooling support for the developers in the first step of...
Custom hardware accelerators are widely used to improve the performance of software applications in terms of execution times and to reduce energy consumption. However the realization of an hardware accelerator and its integration in the final system is a difficult and error prone task. For this reason, both Industry and Academy are continuously developing Computer Aided Design (CAD) tools to assist...
Accurate forecasts of future climate with numerical models of atmosphere and ocean are of vital importance. However, forecast quality is often limited by the available computational power. This paper investigates the acceleration of a C-grid shallow water model through the use of reduced precision targeting FPGA technology. Using a double-gyre scenario, we show that the mantissa length of variables...
FPGA vendors now include hardened IPs to form a system-on-chip (SoC) making it easier to build embedded systems. However programming and integrating hardware accelerators (devices) into these systems present a challenge. The OpenCL standard has become accepted as a good programming model for managing devices, or hardware accelerators in the context of embedded systems on FPGAs, due to its rich set...
In the last decade, OpenCL has sparked the interest of the computing world as it is a language based on an open standard that can run on many different heterogeneous platforms. This standard is continuously evolving to adapt to various use cases of different platforms. For example, with requests from the FPGA community, the pipe construct was added to the standard to facilitate the implementation...
There is now significant interest in OpenCL for FPGAs because it is the first time the FPGA vendors have provided a programming model and a computing platform with integrated high-level synthesis. OpenCL is intended for heterogenous platforms, not just FPGAs, and the standard continues to evolve. Recently, OpenCL has introduced Shared Virtual Memory (SVM) with the goal of simplifying the programming...
Data centers require many low-level network services to implement high-level applications. Key-Value Store (KVS) is a critical service that associates values with keys and allows machines to share these associations over a network. Mostexisting KVS systems run in software and scale out by running parallel processes on multiple microprocessor cores to increase throughput. In this paper, we take an...
In recent years there has been a great interest in High Level Synthesis (HLS) CAD tools to raise the level of design abstraction, reduce design time, rapidly explore the design space and fully exploit the multi-million gate heterogeneous hardware platforms provided by dramatic improvements in integrated circuits. Open Computing Language (OpenCL) is a well-known standard for heterogeneous computing...
In this paper methods of dynamically reconfigurable multi-core System-on-chip (SoC) design are discussed, the approaches of system modeling for evaluation of these systems are presented. The dynamically reconfigurable SoC can be developed using the FPGA and the ASIC technologies. The implementations of dynamic reconfiguration using these approaches are essentially different. The system level modeling...
This paper presents a novel framework for implementing portable and scalable data-intensive applications on reconfigurable hardware. Instead of using expensive “reconfigurable supercomputers”, we focus our work on standard PCs and PCI-Express extension cards featuring Field-Programmable Gate Arrays (FPGAs) and memory. In our framework, we exploit task-level parallelism by manually partitioning applications...
The paper describes heterogeneous parallel processing as a feature of hardware devices. Software supports the configuration of the hardware components and a new kind of system-software supports the distribution of data and the scheduling of tasks. The concept is supported by referring to the relatively recent Open Systems specification, OpenCL. This is briefly described and its likely evolution surmised...
We present a configurable standard environment for electromagnetic (EM) immunity measurement of prototype system-on-chip (SoC). The environment is composed of two boards compliant with the 62.132-2 and 62.132-4 IEC Std Parts, being conceived for radiated and conducted measurements, respectively. The SoC under test can be prototyped on two types of ICs: two FPGAs and a microcontroller. Practical experiments...
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