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This paper describes current ongoing research pertaining to the analysis of design radiation hardness for circuits implemented in Field-Programmable Gate Array (FPGA) devices. Radiation induces single event effects in FPGAs that can cause erroneous operation by upsetting data bits or changing logic behavior. Design-level techniques can help mitigate these upsets to some degree; however, there is currently...
High temperature in test process may invalidate a test due to extra delay, or even damage the circuit under test. Therefore, a thermal-safe test can avoid undesirable yield loss due to the extra delay induced by high temperature. Traditional high level test synthesis approaches just improve hierarchical testability of circuits and minimize test application time. If the thermal effects are ignored,...
We present a practical, systematical method for the evaluation of the soft error rate (SER) of microelectronic devices. Existing methodologies, practices and tools are integrated in a common approach while highlighting the need for specific data or tools. The showcased method is particularly adapted for evaluating the SER of very complex microelectronic devices by engineers confronted to increasingly...
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