The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
A serial interface module based on FPGA platform is designed for data communication between the operator console and Fire Control Computer. Various techniques adopted during the design and optimizations are presented in this paper. The module is developed using VHDL language and is integrated onto a SOC to achieve compact, stable and reliable communication. It supports different baud rates. In the...
Side-channel attacks have become a threat to secure electronic circuits, due to the strong correlation between data pattern and leaking power/timing information. By monitoring the power/timing behavior of a synchronous circuit, an attacker can easily obtain the secret data stored in the device. Although dual-rail asynchronous circuits have more stable power traces, they still show power fluctuation...
It is generally recognized that asynchronous operation of logic networks offers specific advantages over synchronous operation controlled by a central clock when the network is subject to large or widely varying inter-module propagation delays. In this paper we characterize several previously described techniques for achieving asynchronous operation by a single model. Essential to the model is the...
A procedure is presented for encoding the states of a control counter in such a way as to make each output or its complement decodable as a single AND-gate, where the inputs to the AND-gates are state variables or their complements. It is assumed that the number of state variables used is a design choice. In fact, it may well be advantageous to assign more than the minimum required number of variables,...
This paper presents an extension of the basic concepts established by Robert McNaughton and David Muller in the field of asynchronous feedback networks. The ideas developed herein are the results of adapting common logical functions in a manner that simplifies the overall design of asynchronous systems. The prime objecttive is to overcome a weakness common to both of the aforementioned concepts, that...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.