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Lead zirconate titanate (PZT) thin films on insulator- buffered silicon substrates with interdigitated electrodes (IDEs) have the potential to harvest more energy than parallel plate electrode (PPE) structures because the former exploit the longitudinal piezoelectric effect, which is about twice as high as the transverse piezoelectric effect used by PPE structures. In this work, both options are compared...
This paper describes a new three-dimension (3D) flexible parylene-based microelectrode array (MEA) developed for functional electrical stimulation in neural prosthesis. These arrays with 3D tip profile and gold surface were microfabricated employing a parylene-based pattern transfer technique. Silicon tip array was etched by the HNA etchant and covered with parylene hereafter. Metallization on this...
This work aims to examine and analyze carefully the effects of block oxide length (LBO) in a 40 nm multi-substrate-contact field-effect transistor (MSCFET). In addition, the proposed structure is based on the self-aligned (SA) gate-to-body technique. In the MSCFET design the two key parameters are the length and the height of the block oxide which are so sensitive to the short-channel effects (SCEs)...
A planar edge termination technique of trenched field limiting ring is investigated by using 2-dimensional numerical analysis and simulation. The better voltage blocking capability and reliability can be obtained by trenching the field-limiting ring site which would be implanted. The trench etch step makes the junction depth deeper so that junction curvature effect and surface breakdown are less happened...
Continuous scaling, necessary for enhanced performance and cost reduction, has pushed existing CMOS materials much closer to their intrinsic reliability limits, forcing reliability engineers to get a better understanding of circuit failure. This requires that designers will have to be very careful with phenomena such as high current densities or voltage overshoots. In addition to the reliability issues,...
Graphene is a possible candidate for advanced channel materials in future field effect transistors. This presentation gives a brief overview about recent experimental results in the field of graphene transistors for future electronic applications.
We have observed new charge trapping phenomena in sub-80-nm DRAM recessed- channel-array-transistor (RCAT) after Fowler-Nordheim (FN) stress. Gate stack process strongly affected the charge trapping and the trap generating in oxide bulk and interface of RCAT. According to the trapped charges and/or the generated traps after FN stress, the data retention time and writing capabilities of DRAM were dramatically...
A very high deposition rate for high-quality microcrystalline silicon (μc-Si) films has been achieved under very high-pressure conditions (≫ 1,000 Pa) using a Localized Plasma Confinement (LPC)-CVD method which has a special cathode. The uniformity of the μc-Si film thickness was 2.4% on a 55×65 cm2 glass substrate with a deposition rate of 2.7 nm/s. We also achieved maximum conversion efficiency...
This article describes recent progress in high-temperature superconducting oxide electronics. Notable applications include (i) three-terminal superconducting transistors, (ii) Josephson junctions, and (iii) microwave and optical devices. Critical temperatures Tc higher than 77K are characteristic of oxide superconductors, and most applications are based on this feature. Another feature of this kind...
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