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This paper presents the design of a low-power, 9-bit, two-step time-to-digital converter (TDC) in 65 nm CMOS. Instead of using an array of time amplifiers (TAs) to amplify the time residue, the proposed TDC reduces the power and area consumptions by using only one TA. The designed TDC achieves a resolution of 1.2 ps with a conversion range of 0.614 ns while consuming 0.602 mW at 10 MHz and 8.299 mW...
The characterization of a 10×10-SPAD detector module fabricated in a 0.35µm High Voltage CMOS technology is presented. The detector is designed to find application in Fluorescence Lifetime spectroscopy and is capable of performing lifetime measurement by using the time-gated technique. The characterization explores the dark count distribution, the detector dynamic range and the gating performances...
The paper demonstrates a complete acquisition chain of a 300GHz to 1THz image sensor with on-chip multiplexing in a 0.13μm bulk silicon CMOS technology. The pixel consumes less than 100μW and has a responsivity of 90kV/W at 300GHz and of 1.8kV/W at 1.05THz respectively. High resolution and contrast THz images revealing the inner structure of tree leaves are presented. These results show that multi-frequency...
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