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Process variation as a major concern in the current and future generations of CMOS circuits manufacturing has imposed a great deal of effort in design process. Basically, process variations are generally divided in two main categories: random variations and systematic variations. Therefore, physical designers of integrated circuits (ICs) have to take into account the effects of random and systematic...
Design guidelines for static and domino silicon-on-insulator (SOI) CMOS circuits are evaluated. Restructuring the logic to eliminate gates with large fan-ins is almost as beneficial for SOI as for bulk-silicon. Most published design fixes for eliminating parasitic bipolar induced upset are shown to aggravate the charge sharing problem. A new and improved predischarge method for enhancing the noise...
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