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This paper investigates the properties of the on-chip transmission lines with and without metal grounding based on measured data. Physical equivalent-circuit models are employed to evaluate the transmission lines with different ground planes, and the model parameters to predict the characteristics in the oxide layer were established and compared refer to the physical mechanism. Two different structures...
An area-efficient U-shaped slow-wave coplanar waveguide (U-SCPW) in a standard 0.18 μm CMOS process is presented. Compared to a conventional straight line CPW (S-CPW), it provides a more compact layout because of its approximate 1:1 aspect ratio. Measured results show that it has a quality factor and phase velocity comparable to its straight-line counterpart with measured Q ~ 30 at 23 GHz.
This work presents the fabrication and characterization of on-chip micromachined spiral inductors in a commercially available 0.18mum CMOS process provided by TOWER Semiconductors Ltd. It explores the possibility to reduce parasitic effects and extending high frequency performance by applying a maskless micromachining post processing to create fully integrated inductors, suspended over the substrate...
In this paper, a four-phase all PMOS charge pump based on the voltage doubler structure is proposed. The proposed charge pump is designed in 1.8 V 0.18 mum standard CMOS process with high voltage boosting efficiency and little output ripple. Moreover, it solves the voltage overstress problem which exists in the conventional charge pump and eliminates the body effect as well by means of adding two...
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