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Multiplication, as one of the four basic operations embedded in arithmetic processors, is nowadays experiencing being spotlighted by the hardware designers involved in the revived decimal arithmetic. The decimal hardware units usually employ the sequential implementation for this operation, due to the high area cost of the parallel decimal multipliers. However, the main drawback of this iterative...
This paper presents a Radix-100 divider based on decimal non-restoring and selection by truncation method. Two decimal quotient digits can be selected in each iteration, which can reduce half of the iteration cycles. Initialization is required to scale the divisor into a pre-calculated range, and also used for generating some multiples of the scaled divisor. Implemented with STM 90-nm standard cells...
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