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The Internet of Things (IoT) and cloud computing are the prime focus of the current research and development in all field of study. In this work, an attempt is made to enhance the integration of wireless sensor network (WSN) in IoT environment with cloud computing for health care system. IoT is a dynamic network infrastructure, that interconnects different sensor networks through Internet, acquire...
Software defined radios (SDR) have revolutionized communications by enabling flexible implementation and deployment of physical layer and medium access control protocols through software, without the need for specialized hardware. Although SDRs have been around for many years now, there is still tremendous interest to make them work in scenarios that were not previously thought possible. One such...
We propose a model-based description and analysis framework for the design of wireless system architectures. Its aim is to address the shortcomings of existing approaches to system verification and the tracking of anomalies in safety-critical wireless systems. We use Architecture Analysis and Description Language (AADL) to describe an analysis-oriented architecture model with highly modular components...
This paper introduces some concepts of WSN and Pervasive Computing, then presents AesSidhe, a WSN architecture currently under design in Instituto Tecnológico de la Laguna. The features and constraints of the hardware architecture are described, and the current work in the software architectureis described and commented. An analysis of usage of the architecture in pervasive computer systems for three...
To simplify computer management, various administration systems based on wired connections adopt advanced techniques to manage software configuration. Nevertheless, the strong relation between hardware and software makes for an individualism of that management, besides penalizing computational mobility and ubiquity. All these issues lead to degradation of scalability, flexibility and the facility...
We propose a programmable heterogeneous multi-processor system-on-chip (MPSoC) platform architecture for flexible radio processing that aims at striking a balance between performance (as provided by ASICs) and flexibility (as provided by SDR). Based on a novel hardware-oriented Virtual Flow Pipelining (VFP) framework, the key highlights of this solution are a simple task-level programming model for...
Worldwide attention has been gained by WirelessHART networks particularly in recent years, which has integrated sensor technology, wireless communication technology and computer technology with the ability of information collection, transmission and processing in low cost and low power consumption. It has several important applications such as remote environment monitoring, asset monitoring and flow...
Full-fledged software radio platforms are complex and expensive systems, focused on signal processing, and not very suitable for easy development and large scale experimentation. We propose a Multi-Processor System-on-Chip (MPSoC) prototyping platform targeting the support for flexible radio. This platform is fully customizable at every layer of the wireless networking stack, making it easy to prototype...
With the multitude of existing and upcoming wireless standards, it is becoming increasingly difficult for hardware-only baseband processing solutions to adapt to the rapidly changing wireless communication landscape. Software defined radio (SDR) promises to deliver a cost effective and flexible solution by implementing a wide variety of wireless protocols in software. In previous work, a fully programmable...
To address the challenges of the consumer wireless device industry, we have designed a dynamically reconfigurable architecture with flexibility limited to address the MAC layer. It is a Software/Hardware partitioned platform in which critical tasks are delegated to a dynamically reconfigurable hardware co-processor. It will handle data streams of multiple (up to 3) different protocol standards, by...
We have designed a coarse-grained, dynamically reconfigurable architecture, specifically for implementing the wireless MAC layer in consumer hand-held devices. The dynamically reconfigurable MAC Processor is a SoC architecture that uses a reconfigurable hardware co-processor to delegate critical tasks. The co-processor can reconfigure packet-by-packet, handling upto 3 data streams of different protocols...
The dynamically reconfigurable MAC processor is an innovative architecture specialized for the wireless MAC layer, and aimed at consumer hand-held devices. It is a software/hardware partitioned platform where the microprocessor uses a reconfigurable hardware co-processor to delegate critical tasks. This allows the microprocessor to handle fast and complex MAC protocols while clocking at relatively...
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