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A reduced interface and high performanceembedded system architecture (MSBUS) is proposed in thispaper. The control bus is low-cost and low-power, whereas thedata bus is high-bandwidth and high-speed especially. Inaddition, a Universal Verification Methodology (UVM)-basedperformance evaluation methodology is proposed to estimate thehardware structures. In order to evaluate the bus performance, AHB,...
This paper gives an overview of the system architecture and software design challenges for Electric Vehicles (EVs). First, we introduce the EV-specific components and their control, considering the battery, electric motor, and electric powertrain. Moreover, technologies that will help to advance safety and energy efficiency of EVs such as drive-by-wire and information systems are discussed. Regarding...
We present a cooperative driving protocol that assists drivers in merging with other vehicles. We develop a modular architecture that is based upon the multiple hardware and communications platforms that must participate in this type of system. The architecture isolates the lower level functions related to the hardware from the application, and simplifies writing the merge protocol. We specify the...
Many functions of embedded systems are implemented by software for flexibly dealing with frequent upgrade and for quickly fixing unpredictable bugs in applications. This system architecture is however generally less energy efficient than that implemented by application specific hardware. As a remedy of this issue, this paper proposes a processor-based platform having an RTOS in hardware for energy...
In this paper we present a design methodology for the identification and development of a suitable hardware platform (including dedicated hardware accelerators) for the data plane processing of the LTE protocol stack layer 2 (L2) in downlink direction. For this purpose, a hybrid design approach is adopted allowing first investigations of future mobile phone platforms on the system level (using virtual...
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