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A new approach blends a new camera architecture based on a digital micro-mirror device with the new mathematical theory and algorithms of compressive sampling. The “single-pixel” compressive digital camera functions by the method of focussing the desired image onto a digital micro-mirror device (DMD) consisting of an array of N tiny mirrors. Camera architecture employs a digital micromirror array...
This paper presents FPGA based VGA display interface design for image display verification during test procedure in the star sensor debugging phase. Methods of asynchronous FIFO, methods for data update during line blanking interval and vertical blanking interval were adopted, and CCD camera's requirements for special sequential order were satisfied, and the metastable state problem caused by data's...
The paper designs a common image acquisition system for digital cameras with Camera Link interface. The system uses CMOS image sensor of 1.3 million pixels as the light-sensitive chip and high-performance FPGA as the main controller. In order to meet ease of use and high real-time demands, the system uses high-speed USB2.0 interface to transfer image data between the acquisition system and PC. Further...
A novel hardware implementation of an omnidirectional image sensor is presented which is capable of acquiring and processing 3D image sequences in real time. The system consists of a hemispherical arrangement of a large number of CMOS imagers, connecting to a layered arrangement of a high-end FPGA platform that is responsible data framing and image processing. The hardware platform in charge of real-time...
High speed stereo vision can allow unmanned robotic systems to navigate safely in unstructured terrain, but the computational cost can exceed the capacity of typical embedded CPUs. In this paper, we describe an end-to-end stereo computation co-processing system optimized for fast throughput that has been implemented on a single Virtex 4 LX160 FPGA. This system is capable of operating on images from...
Object movement influences the distance reliability of 3-D time-of-flight cameras and thus affects subsequent processing tasks in a negative way. This paper proposed a simple motion suppression method for objects moving on a conveyor belt, which can be easily implemented in hardware. Due to the hardware implementation, real-time performance is guaranteed. The algorithm has been validated in software...
Object detection is a vital task in several emerging applications, requiring real-time detection frame-rate and low energy consumption for use in embedded and mobile devices. This paper proposes a hardware-based, depth-directed search method for reducing the search space involved in object detection, resulting in significant speed-ups and energy savings. The proposed architecture utilizes the disparity...
Restoring sight to the visually impaired poses significant challenges across multiple disciplines. In this demonstration, we present a prototype vision processing system to perform the external processing and to provide a technical user interface for a vision prosthesis. The system transforms an input video stream into intensity values suitable for transmission to a stimulation array implanted within...
The use of computer vision based approach has started to bring the intelligence to many of the modern machineries. Such kind of high performance image processing systems can be efficiently built using Field Programmable Gate Arrays (FPGAs). This paper presents the design and implementation of FPGA based Computer Vision System for offset error computation of a new proposed registration mark pattern...
In order to obtain depth perception in computer vision, it is needed to process pairs of stereo images. This process is computationally challenging to be carried out in real-time, because it requires the search for matches between objects in both images. Such process is significantly simplified if the images are rectified. Stereo image rectification involves a matrix transformation which when done...
We describe the reliable vergence eye movement control of a binocular robot vision system based on a disparity computation in the primary visual cortex (V1). The system consists of two silicon retinas, simple cell chips, and an FPGA. The silicon retinas emulate a Laplacian-Gaussian (∇2G)-like receptive field of the vertebrate retina. The simple cell chips generate an orientation-selective receptive...
This paper presents a system where online game players can track the reactions and body movements of others by using only a small bandwidth. A depth map generation and depth layer separation system is presented which allows the game manufacturer to send customized information to different parties. The stereo image acquisition and depth map generation system is implemented on a single FPGA device....
Vision based navigation and path planning for the Indian Lunar Rover calls for Stereo navigation cameras. These Navcams proposed to be mounted at the front face of the Rover, give information of obstacles like boulders/ craters/ pits on the path ahead. By analyzing the scene captured by these Navcams, the trajectory of the Rover will be planned and executed. The design of a miniature Navcam to operate...
In this paper, we discuss a method of distance and relative speed estimation for ITS by using a certain amount of focus blur. In this method, we use different focus positions of two cameras for obtaining the amount of focus blur. Next, we propose the method of distance estimation by the amount of focus blur and disparity information. According to the result of simulation, the distance and relative...
This paper describes an FPGA-based system capable of computing the distance of objects in a scene to two stereo cameras, and use that information to isolate objects in the foreground. For this purpose, four disparity maps are generated in real time, according to different similarity metrics and sweep directions, and then merged into a single foreground-versus-background bitmap. Our main contribution...
To solve the non-uniformity problem of multi Time Delay Integral Charge Couple Device (TDICCD) mosaic camera, a non-uniformity correction algorithm is proposed and implemented on Field-Programmable Gate Array (FPGA) platform. Firstly, the generation and definition of non-uniformity are introduced; several common non-uniformity correction methods are discussed. Secondly, the correction algorithm is...
In order to obtain depth information about a scene in computer vision, one needs to process pairs of stereo images. The calculation of dense depth maps in real-time is computationally challenging as it requires searching for matches between objects in both images. The task is significantly simplified if the images are rectified, a process which horizontally aligns the objects in both images. The process...
The design and the implementation of algorithms on FPGA-based architectures, is a complex task, above all for image processing. Many vision applications (video monitoring, obstacle detection from a vehicle) require real time performance. This paper analyzes only a classical function involved in these applications: pixel characterization by an attribute vector, and pixel classification as belonging...
This paper presents the design and implementation of robust real-time visual servoing control with an FPGA-based image co-processor for a rotary inverted pendulum. The position of the pendulum is measured with a machine vision system whose image processing algorithms are pipelined and implemented on a field programmable gate array (FPGA) device to meet real-time constraints. To enforce robustness...
We describe the implementation in a self-standing system of a novel contrast-based binary CMOS imaging sensor.This sensor is characterized by very low power consumption and wide dynamic range, which makes it attractive for wireless camera network applications. In our implementation,the sensor is interfaced with a Flash-based FPGA processor,which handles data readout and image processing.This self-standing...
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