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The multi-stack processes for wafer-on-wafer (WOW) have been developed. The key features are bumpless interconnects adapted to TSVs and extendibility for chip-on-wafer (COW) taking high throughput into account. In order to realize the multi-stacked wafers with ultra thinned wafer of less than 10μm with an adhesive polymer, several processes have been optimized. The thickness of the wafer after back-grinding...
The multi-stack process on wafer-on-wafer (WOW) has been developed. In order to realize the multi-stacked wafer with ultra thinned wafer of less than 10 μm with adhesive polymer, several processes have been optimized. The wafer thickness after back-grinding was controlled within the total thickness variation (TTV) of 1.2 μm on wafer-level of 8 inch. For the side wall of though silicon vias (TSV),...
Low-temperature aluminum-germanium (Al-Ge) eutectic bonding has been investigated for monolithic three-dimensional integrated circuits (3DIC) applications. Successful bonds using Al-Ge bilayer films as thin as 157 nm were achieved at temperatures as low as 435degC, when applying 200 kPa down-pressure for 30 minutes. The liquid phase of the eutectic composition ensured a seamless and void-free bond...
In order to solve the pressure measurement problem in the harsh environment, such as high temperature above 200degC, a special piezoresistive pressure sensor chip has been developed. Based on the MEMS (micro electro-mechanical system) and SIMOX (separation by implantation of oxygen) technology, the piezoresistive pressure sensor chip was constituted by silicon substrate, a thin buried silicon dioxide...
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