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This paper describes a multi-bit cascaded sigma-delta modulator in which an over-sampled single-bit DAC emulates the behavior of a multi-bit DAC. Such an implementation, benefits from the inherent linearity of a single-bit DAC, and avoids the extra loop-delay imposed by dynamic element matching techniques required to linearize multi-bit DACs. The behavior of an oversampled single-bit DAC has been...
A Sigma-Delta (SigmaDelta) modulator with 10 bits of resolution and only 55 nW power consumption for electroencephalogram (EEG) applications is presented. The overall modulator operates from 1.2 V using Quasi-Floating-Gates (QFG) based circuits. The system has been implemented in a standard 0.5-mum CMOS process. Post-layout simulations have been performed showing 70 dB of SNR with an oversampling...
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