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Protecting the environment from many threats has become a priority worldwide. The existing sensor technology enables the continuous monitoring of various parameters related to environment status, such as air quality and many others. In this paper we propose a secure architecture based on cellular networks to collect such sensors' information in real time. The cell phones can interact with the cellular...
The testability of cryptographic cores brings an extra dimension to the process of digital circuits testing security. The benefits of the classical methods such as the scan-chain method introduce new vulnerabilities concerning the data protection. The Built-In Self-Test (BIST) is considered to be the most suitable countermeasure for this purpose. In this work we propose the use of a digit-serial multiplier...
As a high-speed developing technology, RFID (Radio frequency identification) has been widely used in many fields, including several security-sensitive applications with high security demanded, which is usually ensured with a variety of cryptographic operations. Actually, not all the types of RFID system can provide the corresponding resources required. Conversely, the limited resources also impose...
Cryptographic circuits are nowadays subject to attacks that no longer focus on the algorithm but rather on its physical implementation. Attacks exploiting information leaked by the hardware implementation are called side-channel attacks (SCAs). Among these attacks, the differential power analysis (DPA) established by Paul Kocher et al. in 1998 represents a serious threat for CMOS VLSI implementations...
Name Services for the Internet of Things (specifically, the EPCglobal Network) are distributed systems that serve the following fundamental lookup function: Given an identifier for a real-world object, e.g., an Electronic Product Code (EPC), they return a list of Internet addresses of services, which offer additional information about this object. Without name services acting as a broker between items...
There are a number of techniques and pieces of hardware and software aimed at promoting information security. In the present paper it is presented a security system dynamically reconfigurable in FPGAs. SSDR presents a robust architecture, which enables the implementation of specific and general security policies in order to guarantee services such as confidentiality, authenticity, integrity, availability,...
This paper deals with the design of an area-time efficient hardware architecture for the multivariate signature scheme, Rainbow. As a part of this architecture, a high-performance hardware optimized variant of the well-known Gaussian elimination over GF(2l) and its efficient implementation is presented. Besides solving LSEs, the architecture is also re-used for the linear transformation operations...
In this paper, we propose a scalable RSA cryptosystem chip, which is implemented with a 32-bit modular multiplier. Our design provides the trade-off between security and computation time. If the security is more important, we can choose longer key to get higher security. Otherwise, the shorter key could be chosen to reduce the computation time. The RSA core takes 2.83 M clocks to finish a 512-bit...
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