The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
A direct high-k/Si gate stack has been proposed for gate oxide scaling. With LaCe-silicate, an EOT of 0.64 nm with an average dielectric constant (kav) of 17.4 has been obtained and an extremely low gate leakage current (Jg) of 0.65 A/cm2. The flatband voltage (Vfb) can be controlled by the compositional ratio of La in the LaCe-silicate layer. Furthermore, incorporation of Ge atom into the silicate...
In this work, impact of domain boundaries on dielectric properties of epitaxial Gd2O3 thin films grown on Si(001) substrates with 4?? miscut along [110] azimuth were studied. Epitaxial Gd2O3 layers with and without domain boundaries could be prepared on same Si(001) substrates with 4?? miscut when the surface is prepared under special condition prior to the layer growth. A miscut substrate surface...
Experimental results for crystalline Gd2O3-based MOS capacitors show that these layers are excellent candidates for application as very thin high-K materials replacing SiO2 in future MOS devices. First electrical characteristics of n- and p-type SOI-MOSFETs with epitaxial Gd2O3 demonstrate the general feasibility of this novel gate insulator, but thermal stability during typical CMOS annealing processes...
Reliabilities of high-k stacked gate dielectrics are discussed from the viewpoint of the impact of initial traps in high-k layer. TDDB reliability can be explained by the generated subordinate carrier injection (GSCI) model. While initial traps increase the leakage current, they do not degrade the TDDB reliability. In contrast, the BTI reliability is strongly degraded by initial traps.
Long-channel Ge pMOSFETs and nMOSFETs were fabricated with high-kappa CeO2/HfO2/TiN gate stacks. CeO2 was found to provide effective passivation of the Ge surface, with low diode surface leakage currents. The pMOSFETs showed a large I ON/IOFF ratio of 106, a subthreshold slope of 107 mV/dec, and a peak mobility of approximately 90 cm2 /Vmiddots at 0.25 MV/cm. The nMOSFET performance was compromised...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.