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Nowadays, driven by the consumer demands, the multimedia market is booming and the video coding standards evolve rapidly. A dynamically coarse grain reconfigurable architecture REMUS-II (REconfigurable MUltimedia System 2) is developed as a multi-standards, high resolution, power efficient, and real-time multimedia decoding processor. The hierarchical pipeline is adopted in the REMUS-II for multimedia...
Two of the most popular video coding standards, MEPG-2 and H.264, are realized on PAC Duo platform, a heterogeneous multi-core SoC containing one ARM core and two PACDSP's (Parallel Architecture Core DSP). In addition to the optimization of the video software codes, in order to fit to the architecture of PACDSP, the inter-core synchronization required by the dual core implementation must be added...
Most research efforts have concentrated on advancement in video compression techniques resulting in DivX/Xvid codecs for better performance on handheld devices. Initial investigations reveal that these techniques are actually taking less time compared to entire execution time in a typical media playback system. However, it enlists that the buffer management methods employed in multimedia framework...
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