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A digital-to-transcoductance converter is presented for use with digitally programmable Nauta structure operational amplifiers. The converter architecture consists of parallel connected tri-state CMOS inverters sized in such a way as to present a complete range of transconductance tunability at the expense of linearity and transconductance output range. Our converter architecture is analysed under...
This paper describes a novel two-stage fully-differential CMOS amplifier comprising two self-biased inverter stages, with optimum compensation and high efficiency. Although it relies on a class A topology, it is shown through simulations, that it achieves the highest efficiency of its class and comparable to the best class AB amplifiers. Due to the self-biasing, a low variability in the DC gain over...
The paper presents a detailed study on the idle leakage reduction techniques on partially depleted silicon-on-insulator (PD-SOI) CMOS SRAM. The most promising leakage reduction techniques that have been proposed are introduced, analyzed and compared into 65 nm low-power PD-SOI technology, taking into account all the SOI specific effect. Especially, it is shown that the leakage reduction techniques...
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