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Molded underfill (MUF) process for system in package with WLCSP package with cu pillar bump would be the future application in SIP module assembly due to small form factor and low cost of WLCSP and good electrical, thermal performance, fine pitch and lower cost of cu pillar bump. However, higher stiffness of cu pillar could cause interface fracture between cu pillar and solder bump during SMT process...
TSV (Through Silicon Via)-based interposer has been proposed as a multi-die package solution to meet the rapidly increasing demand in inter-component (e.g. CPU, GPU and DRAM) communication bandwidth in an electronic system. he stacked-silicon die package configuration may give rise to package reliability concerns not observed in conventional monolithic flip-chip packages. 3D finite element method...
Through-silicon-via (TSV) technology permits devices to be placed and wired in the third dimension. Currently, there is a strong motivation for the semiconductor industry to move to 3-D integration using the TSV approach due to many advantages of TSV application. However, there are also some challenges for stacked die package with TSVs. One of the challenges is thermo-mechanical reliability of multi-layer...
Glass has long been used for photovoltaic (PV) module covers and thin-film (TF) module substrates and superstrates. These applications typically use float glass of soda-lime-silica composition and thickness ≥ 3.2 mm. Thin specialty glass is being considered as a replacement for substrates and superstrates for dual-glass laminated TF PV modules. This study focuses on module in-service stresses and...
In this paper, the fine pitch ball grid array (FBGA) assembly with lead free solder was tested under thermal cycling condition. Finite element modeling and simulation was conducted. The microstructure designs of via in pad of substrate and through hole (via) in PCB under the solder joint were simulated. The solder mask definition (SMD) and non-solder mask definition (NSMD) on PCB board side was also...
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