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A super-pixel based on-chip compression is proposed in this paper. The compression is achieved by reading only one sample for each super-pixel. The proposed technique and the corresponding circuit are simulated in MATLAB and UMC 180 nm CMOS technology, respectively. Higher values of PSNR are observed as compared to the state-of-the-art on-chip compression techniques. For the compression factor of...
Power integrity of integrated circuits (IC) becomes more important due to increasing dynamic current with lower supply voltage. However, we cannot perform the power noise analysis when using IC internal voltage regulator module (VRM) in present common tools. To predict practical voltage drop, the simulation model should include accurate on/off-chip power distribution network and internal voltage regulator...
An equivalent circuit model for simultaneous switching output (SSO) drivers is constructed. The simultaneous differential equations for the pattern-dependent SSO waveforms are built from the model and analytically solved. The analytical solutions are validated by comparison with the HSPICE simulation results. The effects of the number of pull-up and pull-down transitions are also investigated from...
A centralized approach to solve optimal operation of a practical sized distribution grid with a large number of electric vehicles (EVs) is a computationally challenging task. This work proposes a bi-level hierarchical optimization framework to solve the problem. In the hierarchy, optimal operation of the distribution grid is considered in one level, while the optimal operation of EVs is carried out...
Power supply bypass capacitors are critical to the operation of high-frequency analog and digital circuits, yet are seldom considered in the depth they deserve. This paper investigates their use and the resulting power integrity effects as seen from an RFIC bondpad looking out to a host PCB. We show how designs can be either successful or unsuccessful depending on the capacitor values selected and...
Electrochemical batteries are complex devices to model whose static and dynamic responses are highly dependent on the value of its internal and external variables. This paper aims to determine the different importance of considering three of them (state of charge, hysteresis and room temperature) on the battery modeling accuracy. The battery model used in the paper is based on an electrical model...
The output voltages at parallel simultaneous switching output (SSO) channels are affected by impedance of power distribution network (PDN) and SSO patterns. In this paper, a target impedance for PDN is directly extracted from the allowable signal output variations due to the SSO patterns.
Semiconductor testing, aimed at detecting manufacturing defects and marginalities, should be able to screen out fabrication artifacts that affect immediate as well as future mission-mode device performance. While a large amount of resources are dedicated towards catastrophic fault detection, parametric fault detection is an increasingly important research area. Parametric faults marginally affect...
This paper discusses the susceptibility of sigma-delta analog-to-digital converters to disturbances, arising from environmental electromagnetic pollution or from the parasitic coupling with noisy building blocks integrated in the same system-on-chip (SoC) or system-in-package (SiP). The operation of a first-order switched-capacitor sigma-delta converter, which receives at its input nominal signals...
Real-world realization of RF SoC has been hindered by the lack of high-performance, compact and tunable RF passive devices that are truly CMOS-compatible. This paper presents advances in low-temperature metal MEMS techniques developed to design and fabricate various high-performance RF passives for post-CMOS integration with RF SoC. Constructed with electroplated metal, the RF MEMS passives are suspended...
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