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A physics-based analytical compact model of InGaAs FETs for logic applications is developed. This model neither heavily depends on parameter extraction nor requires any time-consuming computation, enabling digital circuit design and circuit-level performance estimation for III-V FETs. The model captures SCE, trapezoidal well QW energies and capacitances including 2D potential profile information.
A realistic 40 nm InAs high electron mobility transistor is studied using a two-dimensional, full-band, and atomistic Schrodinger-Poisson solver based on the sp3d5s*. tight-binding model. Bandstructure non-parabolicity effects, strain, alloy disorder in the InGaAs and InAlAs barriers, as well as band-to-band tunneling in the transistor OFF-state are automatically included through the full-band...
Linear and non-linear modelling of a novel ultra-low noise InGaAs/InAlAs pHEMTs have been used to design a low noise amplifier operating from 0.3 to 2 GHz. The LNA has ~ 0.4 dB NF across the whole frequency band, power gain of 26 dB at 1.4 GHz and IP3 of 14 dBm, making it a good candidate for the aperture array concept of the Square Kilometre Array (SKA) telescope, GSM, GPS, civil and military DAB.
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