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With the advance of semiconductor, multi-core architecture is inevitable in today's embedded system design. Nested loops are usually the most critical part in multimedia and high performance DSP (Digital Signal Processing) systems. Hence, maximizing loop parallelism is an important issue to improve the performance of a modern compiler. This paper studies how to maximize the system performance with...
In this paper, we present a new fully programmable heterogeneous multi-core processor architecture for SDR (software defined radio). To meet the computation properties of different algorithms, our solution contains three types of processor cores: two SIMD (Single Instruction Multiple Data) cores, four general purpose DSP cores and an embedded controller core. In order to verify the efficiency of our...
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