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In this paper, we present different modeling and execution frameworks that allow us to efficiently analyze, design and verify complex systems, mainly to cope with the specific concerns of the Real-time and embedded systems (RTE) domain. First we depict a UML /MARTE based methodology for executable RTE systems modeling with a framework and its underlying model transformations required to execute UML...
A new generation of distributed real-time systems (DRTS) is based on heterogeneous models of computation and communication and is associated with flexible real-time constraints. Classical design flows based on realtime scheduling theory display important limitations related to the restrictive assumption on the system model. On the other hand, formal verification of timed automata is far more general,...
In this paper, we present automated formal verification of the DHCP Failover protocol. We conduct bounded model-checking for the protocol using Timeout Order Abstraction (TO-Abstraction), a technique to abstract a given timed model in a certain sub-class of loosely synchronized real-time distributed systems into an untimed model. A resulting untimed model from TO-abstraction is a finite state machine,...
We propose an automated, tool-supported approach to scenario-based analysis and synthesis of real-time embedded systems. The inter-object behaviors of a system are modeled as a set of live sequence charts (LSCs), and the scenario-based user requirement is specified as a separate LSC. By translating the set of LSC charts into a behavior-equivalent network of timed automata (TA), we reduce the problems...
Pattern solutions for software and architectures have significantly reduced design, verification, and validation times by mapping challenging problems into a solved generic problem. In the paper, we present an architecture pattern for ensuring synchronous computation semantics using the PALS protocol. We develop a modeling framework in AADL to automatically transform a synchronous design of a real-time...
In this paper, we focus on modeling and verification of PLC systems, which are widespread in industry and manufacture. Our approach is based on a translation procedure from PLC programs to timed automata. The resulting model consists of several kinds of modules. Besides the main module which depicts the behaviors of the PLC programs, a dedicated module is constructed to simulate the cyclical running...
This paper makes the case that the time is right to introduce temporal semantics into programming models for cyber-physical systems. Specifically, we argue for a programming model called PTIDES that provides a coordination language rooted in discrete- event semantics, supported by a lightweight runtime framework and tools for verifying concurrent software components. PTIDES leverages recent innovations...
Monitoring and control of systems using a wireless sensor network (WSN) play a significant role in rapid automated response to events. Automation drives the necessity to check the system correctness due to the critical nature of the operations (i.e. military, air traffic management). The motes in a WSN are event-driven systems. The evolution of the system can be captured by discrete and continuous...
This paper presents a framework for modeling and verification of mini real-time applications running under a multitasking kernel. The model described as networks of timed automata is mapped to real time operating systemspsila tasks. We focus on cooperative scheduling tasks with different priorities. For the tasks to be as simple as possible, a unified resource access interface is necessary.
Systems verification requires first to model the system to be verified, then to formalize the properties to be satisfied, and finally to describe the behaviour of the environment. This last point, known as the proof context, is often neglected. It could, however, be of great importance in order to reduce the complexity of the proof. The question is then how to formalize such a proof context. This...
End-to-end latency of messages is an important design parameter that needs to be within specified bounds for the correct functioning of distributed real-time control systems. In this paper we give a formal definition of end-to-end latency, and use this as the basis for checking whether a stipulated deadline is violated within a bounded time. For unbounded verification, we model the system as a set...
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