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The highest electron mobility in Ge NMOS to-date, ~1.5 times the universal Si mobility, is demonstrated experimentally. Gate stack engineered with ozone-oxidation is integrated with low temperature S/D activation to fabricate Ge NMOS. Mechanisms responsible for poor Ge NMOS performance in the past are investigated with detailed gate dielectric stack characterizations and Hall mobility analyses for...
The effect of constant voltage stress on Pt/La2O3/n-Ge MOS devices biased at accumulation is investigated and reported. It is found that the stress induced leakage current (SILC) initially increases due to electron charge trapping on pre-existing bulk oxide defects. After 10 s approximately, a clear decay of SILC commences which follows a t-n power law, with n lying between 0.56 and 0.75. This decay...
Polarities of plasma charging damage in n- and p-channel MOSFETs with Hf-based high-k gate stack (HfAlOx/SiO2) were studied for two different plasma sources (Ar-and Cl-based gas mixtures), and found to depend on plasma conditions, in contrast to those with conventional SiO2. For Ar-plasma, which was confirmed to induce a larger charging damage, both n- and p-ch MOSFETs with high-k gate stacks suffer...
Reliabilities of high-k stacked gate dielectrics are discussed from the viewpoint of the impact of initial traps in high-k layer. TDDB reliability can be explained by the generated subordinate carrier injection (GSCI) model. While initial traps increase the leakage current, they do not degrade the TDDB reliability. In contrast, the BTI reliability is strongly degraded by initial traps.
We have observed new charge trapping phenomena in sub-80-nm DRAM recessed- channel-array-transistor (RCAT) after Fowler-Nordheim (FN) stress. Gate stack process strongly affected the charge trapping and the trap generating in oxide bulk and interface of RCAT. According to the trapped charges and/or the generated traps after FN stress, the data retention time and writing capabilities of DRAM were dramatically...
Microscopical investigation of leakage behaviors of Hf-based high-k gate stacks was achieved by means of electron-beam-induced current (EBIC) method. Carrier separated EBIC measurement has found that in non-stressed samples, hole conduction in pMOS is significantly enhanced by trap-assisted tunneling, while electron conduction in nMOS is independent of traps. The transport mechanisms of electron and...
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