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This paper presents an experimental analysis of the impact of AC- and DC-type Negative Bias Temperature Instability (NBTI) stresses on the CMOS inverter DC response and robustness. The results reveal, on one side, that the inverter DC response under AC NBTI presents a parallel shift of that shown under DC NBTI. However, the AC- to DC-induced shift of the inverter logic threshold is found much less...
Motivated by the growing desire for low power design as well as the stochastic behavior of electronic circuits, the probabilistic computing based on inherently stochastic devices has been proposed. The single-electron (SE) technology is a promising candidate for implementing probabilistic switches due to its intrinsic mechanism and nanoscale feature size. In this paper, we analyze the stochastic behavior...
This paper presents a novel method to improve the performance of sub-threshold (sub-VT) gates in 65-nm CMOS technology. Faster transistors with a lower threshold voltage are introduced in the weaker network of a gate. It is shown that the employed method significantly enhances the reliability and performance of the gate, with an additive advantage of a lower area cost compared to traditional transistor...
We elaborated a new ultra low-power nanometer circuit design methodology by introducing statistical fluctuations in advanced technology nodes as noise sources causing computational errors. The modeling is performed on sub-50 nm technology node to create a statistical performance metric. The relationship between the probability of error and the circuit noise for a variety of different configurations...
Stability, performance and reliability together they define features of a product. Optimization is possible when right topology is used. Series resonant and parallel resonant topologies are traditionally being used for control of induction heating plant. It is necessary to zero down on topology for optimal performance in induction heating for wide range (power and frequency) applications. This paper...
Noises from Electric Power Steering (EPS) motor will be considered in this paper. We will discuss noises from EPS motor and noise reduction structure design. Technologies for designing power electronic circuits which are used in everything from industrial and communications equipment to household electrical appliances are an important factor that determines the quality and cost of such products. In...
A radiation hardened read circuit for a SONOS type EEPROM memory is designed in 0.6mum SOI process. Total dose radiation would cause large threshold voltage shifts of both memory cells and MOS transistors, hence degrades the reliability and performance of the sense amplifier. Compensation techniques for the sampling inverter and discharge path are proposed to achieve radiation hardness. Double branch...
Broad similarity between negative bias temperature instability (NBTI) relaxation and 1/f noise is observed. Individual transitions in NBTI relaxation in small pFETs are observed and Poisson defect number statistics is inferred. Finally, it is argued that the wide distribution of defect times should be considered in addition to defect number variation in small devices.
Reactivation noise is an important reliability concern in standard sequential MTCMOS circuits. The ground bouncing noise, the leakage power consumption, and the data stability of various sequential MTCMOS circuits are evaluated in this paper. The attractive application space of different data retention MTCMOS circuit techniques is identified for various design metrics with a 90 nm CMOS technology.
Continuous scaling, necessary for enhanced performance and cost reduction, has pushed existing CMOS materials much closer to their intrinsic reliability limits, forcing reliability engineers to get a better understanding of circuit failure. This requires that designers will have to be very careful with phenomena such as high current densities or voltage overshoots. In addition to the reliability issues,...
In deep submicron era, to prevent larger amount of SRAM from more frequently encountered overheating problems and react accordingly for each possible hotspots, multiple ideal run-time temperature sensors must be closely located and response rapidly to secure system reliability while maintaining core frequency. This paper presented a method to extract run-time temperature information from multiple...
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