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Monte Carlo device simulations are carried out to analyse electron transport in scaled Si and In0.3Ga0.7As MOSFETs starting from a 25 nm gate length Si and In0.3Ga0.7As MOSFETs monitoring the electron velocity, kinetic energy and sheet density along the channel at a supply voltage of 1.0 V. We have found that while the drive current is scaled Si MOSFETs dramatically increases, the current increase...
The ITRS predicts that the scaling of planar CMOS technology will continue till the 22 nm technology node and a possible extension is extremely tempting. The desire to continue the scaling of planar technology is driven by lower costs when compared to novel, non-planar technology concepts like multi-gate architectures or nanowires. However, experimental evidence suggests that carrier effective mobility...
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