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Steep channel profiles of scaled transistors are a promising approach for advancing transistor generation in bulk complementary metal-oxide-semiconductor (MOS). In this paper, a carbon-doped Si (Si:C) layer under an undoped Si layer is proposed to form steep p-type channel profiles in n-channel MOS field-effect transistors (nMOSFETs) due to extremely low diffusivity of boron and indium in Si:C layers...
Steep channel impurity-profiles formed by Si:C+Si epitaxial growth have been extensively studied. Especially in pMOS, several concerns are solved by boron-doping underneath Si:C layers. Finally, performance improvement realized by steep channel profiles has been demonstrated in both nMOS and pMOS with the same epitaxial channel structure.
We have successfully reduced threshold voltage variation by combination of co-implantation and laser spike anneal on 45 nm low power SoC platform with conventional poly-Si/SiON gate stack. Doping profiles of CMOSFET channel is modulated through co-implantation of diffusion suppressor. We have explored the possibility of cluster carbon doping in order to minimize junction leakage degradation. Systematic...
Si:C layers under non-doped-Si epitaxial channel (Epi-channel) produces steep channel profile for 25 nm-LG nMOSFET. Si:C layers work as the dopant-diffusion-barriers from the boron doped regions. Moreover, retrograde Halo profiles are also realized in this structure. Steep channel profiles at scaled device are confirmed, and the benefits of its profile at LG of 25 nm are discussed.
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