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Current ultra-high-performance computers execute instructions at the rate of roughly 10 PFLOPS (10 quadrillion floating-point operations per second) and dissipate power in the range of 10 MW. The next generation will need to execute instructions at EFLOPS rates—100$\times$ <alternatives><inline-graphic xlink:type="simple" xlink:href="jacob-ieq1-2424699.gif"/></alternatives>...
Heterogeneous multiprocessor SoCs (MPSoCs) are becoming very complex with greater demands for performance and low power. Advanced hardware techniques and involved software programming (>1000 registers) are employed to attain low/ultra-low power. Power management (PM) software development time is high. It is made worse with heavy rework when migrating across SoCs. In this paper we propose techniques...
This paper proposes a method which utilizing taint analysis to reduce the unnecessary analysis routine, concentrating on the control-flow altering input using concolic (concrete and symbolic) execution procedure. A prototype, Concolic Fuzz is implemented based on this method, which is built on Pin platform at x86 binary level and using Z3 as the SMT (Satisfiability Modulo Theories) solver. The results...
With the rapid development of computer science and Internet technology, software security issues have become one of the main threats to information system. The technique of execution path tracking based on control flow integrity is an effective method to improve software security. However, the dynamic tracking method may incur considerable performance overhead. To address this problem, this paper...
Software extension is a fundamental challenge in software engineering which involves extending the functionalities of a software module without modifying it. Many modern software developers choose to adapt third-party extension platform to further improve customizability. As the project evolves, the requirements may change to include third-party extension support. However to design and to implement...
Recurring bugs are common in software systems, especially in client programs that depend on the same framework. Existing research uses human-written templates, and is limited to certain types of bugs. In this paper, we propose a fully automatic approach to fixing recurring crash bugs via analyzing Q&A sites. By extracting queries from crash traces and retrieving a list of Q&A pages, we analyze...
The Centre in Computer Engineering Studies at Faculty of Electrical Engineering, Universiti Teknologi MARA (UiTM) has developed and built the Intel 8051 Trainer and Application Board that is used by the students at the faculty as a learning tool. This microcontroller is taught in the Microprocessor System course and is available in the Software Application Laboratory. This paper presents the major...
The paper concerns a risk assessment and management methodology in critical infrastructures. The research objective is to adapt a ready-made risk manager, supporting information security- and business continuity management systems, to a new domain of application - critical infrastructure protection. First, a review of security issues in critical infrastructures was performed, with special focus on...
The prevalent use of systems-on-chip (SoCs) makes them prime targets for software attacks. Proposed security countermeasures monitor software execution in real-time, but are impractical, and require impractical changes to the internal logic of intellectual property (IP) cores. We leverage the software observability provided by the readily available SoC debug architecture to detect attacks without...
Intelligent systems for monitoring telecommunication equipment parameters are especially useful in the case of locations that are not under human surveillance. The monitoring system described in our paper is a general one, but it can be adapted and implemented to monitor the specific parameters of equipment utilized in various fields, such as: medicine, agriculture, energetics, chemical industry,...
Data processing and combinatorial search are widely used techniques in the scope of information and communication. Examples of practical applications are sorting, frequent items encountering, matrix/set covering, graph/map coloring, data mining, priority management, and many others. Often information/data processing that involves the listed above tasks has to be done in embedded systems where high...
Today virtualization technology is the focus of many new potential threats and introduces new security challenges that we must meet. The key problem is that malware can utilize the virtualization techniques of modern CPUs for “hidden virtualization” (invisible for user): to execute as a hypervisor and transform the working operation system (OS) into a “guest” state. In this work we analyzed and compared...
Computer designers rely upon near-cycle-accurate microarchitectural simulators to explore the design space of new systems. Hybrid simulators which offload simulation work onto FPGAs (also known as FAME simulators) can overcome the speed limitations of software-only simulators. However such simulators must be automatically synthesized or the time to design them becomes prohibitive. Previous work has...
As hardware components are expected to become ever more unreliable due to the technology scaling, hardware errors have become unavoidable. Dependable systems that rely on a correct functionality often use redundancy to detect such hardware faults during operation. However, to design costefficient reliable systems, it is crucial to effectively exploit the available redundancy. Thus, researchers have...
Dynamic taint analysis technique plays an important role in tracking the input data's trace in an executing program, and it has been widely used in program analysis method, such as information-flow analysis and dynamic slicing. However, most of the tools implementing dynamic taint analysis only consider the data dependence propagation and neglect the control dependence. In this paper, we presents...
While high performance computing (HPC) is flourishing these years, the lack of HPC applications is increasingly serious. Conventional binary translation focused on desktop applications and embedded software, which could not be scaled up to HPC. This paper proposed a novel static binary translator MPI-QEMU aiming at MPI programs, the most commonly used on HPC platforms. Firstly, the efficient dynamic...
Software off-by-one stack based buffer overflow vulnerability may enable attacker to execute arbitrary code via a malformed input, causing persistent threat to computer and communication systems. However, current risk evaluation method is time-consuming and requires a group of people with security knowledge. This paper takes an insight investigation and presents a novel black-box off-by-one stack-based...
The paper introduces the design of Modbus slave based on Modbus RTU over RS-485 and its implementation. By designing a new software architecture and embedded open stacks, development lifetime is shortened as well as the software is easy to port, maintain, and reuse. A new approach inspired from Modbus functionality makes it easier for developer to divide program into three tasks and synchronize them...
Machine learning is becoming pervasive, decades of research in neural network computation is now being leveraged to learn patterns in data and perform computations that are difficult to express using standard programming approaches. Recent work has demonstrated that custom hardware accelerators for neural network processing can outperform software implementations in both performance and power consumption...
We propose a communication architecture for EtherCAT master motivated by the technological progress in IT systems and Industrial Ethernet in control systems. In the proposed method, a dedicated hardware named the EtherCAT accelerator offers virtualized real-time and IT communication channels by operating automatic control frame generation, time synchronization protocol, and transmission scheduling...
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