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An analysis of variation of drain current (dID/dt) of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) in turn-on and turn-off under different temperatures has been performed in this paper. It is shown that the magnitude of turn-off dID/dt is temperature dependent and decreases with tempertature with a fixed supply voltage, load current and gate resistance. While,...
In this paper, design considerations for transitioning from a Si-IGBT based inverter to a SiC-MOSFET based inverter are discussed. An existing Si-IGBT power structure is modified using a footprint compatible SiC-MOSFET module, with changes made to the power structure and gate drive for the high PWM switching frequency required for SiC devices. Design issues such as inductance minimization, EMC mitigation...
This paper presents short-circuit test results on commercial, multi-chip 1200 V SiC MOSFET half-bridge modules up to 860 V dc, suitable for three-phase 480 V grid-interfaced applications. The peak short-circuit current is measured to be over 5 kA, with around 3 μs withstand for the given voltage and commutation loop inductance. During the post-failure investigation, it is observed that only a few...
Carry look-ahead adder (CLA) is a fast adder. This paper is delicated to accelerate the 4-bit CLA circuit. In proposed circuit structure, XOR gate is replaced by NOR gate. Moreover, logic gates have less fan-in and fan-out and signal throughs one less MOS transistor in critical path. All designs are built in dynamic CMOS logic gates. Simulation results show that the proposed architecture has advantages...
In this work is reported a brief summary of considerations for the design of a basic readout CMOS integrated system applied for the conditioning of small signals taken from a floating-gate based CMOS-MEMS capacitive structure intended for inertial measurement. Both the electromechanical structure and the readout circuit (consisting in a variable capacitor coupled to the gate of a MOSFET and a conventional...
This paper presents an experimental switching behaviour comparison of GaN HEMT and SiC MOSFET against their Si competitors, the Si SJ MOSFET and high speed Si IGBT, in the 650 V class. The devices are first compared using their respective datasheets. The test circuit is introduced and hard switching tests under inductive load are performed to reveal the switching performance of the devices. The differences...
This paper covers characterization and gate drive design for high voltage, gallium nitride (GaN), high electron-mobility transistors (HEMT) in a cascode structure. Parameters of high voltage cascode GaN HEMT devices are described and compared to state-of-the-art Si MOSFET devices. Challenges in designing high frequency GaN based power converter and common design practices are described. Effects of...
DC power delivery system is becoming an attractive alternative in an AC dominant world due to its higher energy efficiency and better cable utilization. It has already been applied in data centers, commercial buildings, electrical vehicle charge stations and micro grid systems, etc. Among many new issues that need to be addressed for the DC power delivery system, ultra-fast and accurate protection...
Silicon Carbide (SiC) power devices with super-cascode structure provide a cost-effective solution for high performance medium voltage power switches. However, these SiC super-cascode devices are still in the early development stage, and limited information on the device characteristics is available. This paper presents the characterization and evaluation of a 4.5 kV, 40 A SiC super-cascode device...
Following the recent advances in the production of 3.3 kV and 10 kV SiC power MOSFETs, Wolfspeed launched an effort to develop a new generation 6.5 kV SiC power MOSFET to fill the medium-to high-voltage fast switching device void in applications such as rail traction and mediumvoltage motor drives. The characteristics of the new generation 6.5 kV SiC power MOSFET rated at a drain current of 30 A,...
Compared with other wide bandgap materials, silicon carbide (SiC) possesses the significant advantage of an SiO2 native oxide. However, both thermally grown and deposited oxides on SiC suffer from poor interface quality, and thus both require post deposition anneals in nitric oxide (NO) to obtain usable MOS devices [1], [2]. We report an alternate approach where a passivated, disorder free oxide-SiC...
The goal of this work is to develop a real time degradation monitoring tool for Silicon Carbide (SiC) power MOSFETs. The conventional methods for prognosis and reliability monitoring are mostly based on parametric measurements as on state resistance, threshold voltage, leakage currents etc. The change in switching characteristics of aged devices and the root cause analysis behind this change are also...
In this paper, the degradation at the gate oxide layer of a SiC MOSFET has been studied. The online condition monitoring was achieved by Spread Spectrum Time Domain Reflectometry (SSTDR) for the first time in SiC based devices. An accelerated aging station was built to age the power semiconductor devices in a standardized way, and power cycling test was performed to induce degradation. Finally, the...
Based on the parabolic potential approach (PPA) and equivalent number of gates (ENG), a new quasi-3-D subthreshold current/swing model for the fully depleted quadruple-Gate (FDQG) MOSFET is developed. The model explicitly shows how the channel length, gate oxide thickness, and silicon film thickness affect the subthreshold current/swing behavior. The model is verified by its calculated results matching...
The work reports on an innovative design to improve the scalability of misaligned Double Gate (DG) Tunnel Field Effect Transistor (TFET) for operation as dynamic memory. The design optimization is achieved through use of lateral gap on both edges of back gate (G2) that reduces Band-to-Band Tunneling (BTBT) and enhances Retention Time (RT) by a factor of ∼3. The front gate responsible for read mechanism...
Two hybrid memristor-MOS exclusive OR (XOR) and exclusive NOR (XNOR) logic gates based on Memristor Ratioed Logic (MRL) are presented. The proposed gates present logic states with voltages, and implement the logic operation within one clock cycle. The designs ease the voltage degradation problem of the original MRL logic gates, while consuming fewer area overhead and less delay than their counterparts.
Bidirectional dc-dc converter is an important part of battery energy storage to efficiently control the power flow in or out of the battery. Due to the limited stored energy, it is very important to maximize the amount of deliverable energy to the load by minimizing the losses in the power conversion. In this paper, the proposed high efficiency bidirectional DC-DC converter is based on series resonant...
Since large array devices of MOSFETs are huge for driving capabilities, ESD self protections are also required. Then, the large drain-contact-to-poly-gate-spacing layout rule is usually adopted with large layout areas. In this paper, a new control circuit is implemented for adopting the minimum device layout rule in the LAD. Hence, it results in a very small layout area and ESD self-protection capabilities...
We report on the gate misalignment induced asymmetry to enhance the impact ionization in Germanium (Ge) Junctionless (JL) devices by localizing the carrier depletion to a narrow region of the semiconductor film. Results show that misaligned Ge JL MOSFET can exhibit higher values of impact ionization power per unit volume which leads to a sharp current transition with nearly an ideal Subthreshold swing...
SiC power devices exhibit low on-resistance and are capable of processing high switching frequencies at elevated temperatures. When SiC MOSFETs are employed as switch, minimizing switching power losses is crucial. A proper design of gate driving circuit for SiC MOSFET can ensure minimum losses, safe operation of the device and reliable performance. A comparative study of gate drivers for SiC MOSFETs...
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