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This paper presents the first ASIC implementation of an LR algorithm which achieves ML diversity. The VLSI implementation is based on a novel hardware-optimized LLL algorithm that has 70% lower complexity than the traditional complex LLL algorithm. This reduction is achieved by replacing all the computationally intensive CLLL operations (multiplication, division and square root) with low-complexity...
An improved dual filed modular inversion algorithm which can support inversion operation in both GF(P) and GF(2^m) is proposed in this paper. Compared with previous ones based on Extended Euclidean algorithm, it not only finishes modular inversion arithmetic in dual fields, but also operates much faster by more effective shift operations and avoiding time-consuming magnitude comparison. The simple...
There has been high demand for low power and area efficient implementation of complex arithmetic operations in many digital signal processing applications. The CORDIC (coordinate rotation digital computer) algorithm is a unique technique for performing various complex arithmetic functions using shift-add iterations. This paper proposes an enhanced version of new CORDIC algorithm (obtained from conventional...
Differential power analysis is of great concern because it can be used to break implementations of almost any symmetric or asymmetric algorithm, and several countermeasures have been proposed to protect implementations of cryptographic algorithms except SMS4 cipher. In the present paper, we focus on the differential power analysis attack on SMS4 cipher, and suggest a secure masking scheme for SMS4...
Salsa20 is a stream cipher candidate in the software-oriented profile of the eSTREAM project. ChaCha is a successor stream cipher with improved per round diffusion and, conjecturally, increased resistance to cryptanalysis. Based on the combination of four Salsa20 instances, Rumba is a compression function for hashing schemes. This paper presents the evaluation of five VLSI circuits for Salsa20. Synthesis...
This paper proposes an AES algorithm against both differential power analysis and differential fault analysis and its hardware implementation. This new algorithm emphasizes the feature of defending hardware against two kinds of side-channel attack simultaneously. Since the modified AES algorithm is much more complex than the original one, this paper exploits low hardware cost architecture to realize...
Recently, the growing numbers of cryptosystems based on chaos have been proposed; many of them have good statistical properties and security but low efficiency. To increase operating efficiency of cryptosystems, an improved chaos-based stream cipher algorithm based on discrete chaotic maps is presented. The algorithm improves the complexity of chaos by randomly changing chaotic control parameter....
For MIMO transmissions lattice reduction-aided equalizers have emerged as a potential low-complexity method for achieving the same receiver diversity as high-complexity maximum likelihood (ML) detectors. Toward the VLSI implementation of lattice reduction algorithms, we address the integer-rounding operation present in these algorithms. In particular we exploit the reciprocal-reuse of a complex-valued...
A code converter establishes compatibility between two systems using different codes. Negabinary number system is adopted for unique applications where it provides certain definite advantages over binary number system. In this paper, we have presented VLSI implementation of a novel algorithm that can be used for the conversion of numbers from binary to negabinary number system and vice-versa. This...
This paper presents a high-precision algorithm for the forward and inverse MDCT computations using the unified recursive architecture. In this algorithm, the kernel transform of MDCT/IMDCT can share the same architecture because the coefficients for the recursive formula are the same. The preprocessed input samples in the proposed algorithm allow a lower dynamic range than those of other recursive...
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