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We theoretically study the change of the performance characteristics with various mechanical bending conditions for flexible thin-film transistors (TFTs) by two-dimensional device simulation. The characteristics of newly developed flexible TFTs with high crystalline quality and high carrier mobility are more sensitive to the degree of bending. We developed a model to estimate the change in the characteristics...
In this paper, we present high voltage NLDMOS structure with multiple RSEURF concepts. The NLDMOS is based on 0.35µm BCD process. The multiple RESURF device base on charge balance theory using P-top and N-top to achieve high breakdown voltage and low on-resistance. The 2D simulation result compares the conventional single RESURF NLDMOS structure and the new structure with multiple RESURF devices....
In this work we investigate how spatial heterogeneities of the substrate hole density influence the reverse characteristics of UMG solar cells. Electroluminescence and current-voltage data on highly heterogeneous cells are compared with the predictions of TCAD simulations. Reverse-bias electroluminescence images reveal that the distribution of breakdown sites follows the general pattern of the carrier...
A high voltage Superjunction LDMOS on silicon-on-insulator (SOI) with added fixed charges is proposed in this paper. The increased charges enhance the electric field in the buried-oxide Layer (BOX), and the BOX takes on the almost vertical voltage. The modulated vertical electric field suppresses the charge imbalance in Superjunction caused by the substrate-assisted depletion effect, which improves...
In recent years a new device concept appeared in the IGBT technology. It is a structure between a PT and an NPT device, with a low-doped emitter, where the fundamental role is played by the field-stop layer. In this paper we fixed some considerations about a proper design of this layer. Some simulated and real electrical characteristics of a trench-gate emitter-implanted IGBT will be shown and correlated...
Rapid increasing demand towards high voltage MOSFETs device integrated in low voltage CMOS analog and digital circuits for automobile and power management application has driven the development of 0.18 um high voltage lateral diffused MOSFET (LDMOS) which capable to have 80 V breakdown voltage. During designing this high voltage LDMOS, it is observed that the device performance is very dependent towards...
A planar edge termination technique of trenched field limiting ring is investigated by using 2-dimensional numerical analysis and simulation. The better voltage blocking capability and reliability can be obtained by trenching the field-limiting ring site which would be implanted. The trench etch step makes the junction depth deeper so that junction curvature effect and surface breakdown are less happened...
This paper presents an analytical modeling of ballistic and quasi-ballistic transport, implemented in Verilog-A environment and used for circuit simulation. Our model is based on the Lundstrompsilas approach and uses an expression of the backscattering coefficient given by the flux method. The model takes also into account short channel effects and tales into account the effects of different scattering...
We have observed new charge trapping phenomena in sub-80-nm DRAM recessed- channel-array-transistor (RCAT) after Fowler-Nordheim (FN) stress. Gate stack process strongly affected the charge trapping and the trap generating in oxide bulk and interface of RCAT. According to the trapped charges and/or the generated traps after FN stress, the data retention time and writing capabilities of DRAM were dramatically...
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