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In this paper, a 10 W peak power 2 GHz highly efficient RF pulse width modulation (RF-PWM) based transmitter is presented. RF-PWM signals are generated with a dedicated 65 nm CMOS modulator and subsequently amplified with a GaN Class-E power amplifier (PA). The modulator use extended drain MOS (EDMOS) high voltage transistors to provide the required voltage swing to drive the GaN used as a switch...
A GaAs low-noise amplifier (LNA) is designed with first-time success using a technique for HEMT modelling which divides the device into intrinsic gate fingers embedded in an analysable metal structure. The gate finger is characterised by de-embedding metallisation from a standard test structure. The device is then re-built, with any geometry or layout that the foundry allows, and modelled by electromagnetic...
In this work we present a Monte Carlo study of the influence of the presence of a native oxide which isolates the gate in InAs/AlSb high electron mobility transistors (HEMTs) on their dc and ac performance. A good agreement between simulations and experimental results of I-V curves and small signal equivalent circuit parameters has been found for low VDS, where impact ionization is not of importance...
A Nonlinear Circuit Model (NCM) combined with device/physical parameters was developed by using hyperbolic tangent (tanh) function and applied to GaN high electron mobility transistors (HEMTs). The equations for the NCM were constructed to reproduce the results of a device physical simulation. Model parameters are similar with the parameters used in the device design. The simulated DC and capacitance...
A compact model of III-V HFETs is developed for digital logic circuit applications such as a 6T-SRAM cell. We study sub-22 nm technology III-V SRAM circuit design via III-V MOSFETs with thin high-k dielectric for low gate tunneling current, and optimized extrinsic structure for minimum parasitic capacitance. We investigate the drawbacks of a weak PMOS device in a SRAM cell and propose a minimum requirement...
This paper presents an approach for small-signal modeling of microwave FETs. The model is based on an equivalent circuit whose elements are extracted by an analytical approach. In order to make model bias-dependent and scalable, artificial neural networks are exploited for modeling of the dependence of the equivalent circuit elements on the bias voltages and the transistor gate width. The proposed...
A physics-based analytical compact model of InGaAs FETs for logic applications is developed. This model neither heavily depends on parameter extraction nor requires any time-consuming computation, enabling digital circuit design and circuit-level performance estimation for III-V FETs. The model captures SCE, trapezoidal well QW energies and capacitances including 2D potential profile information.
GaN HFETs and MISHFETs are promising power devices for RF and microwave power applications. However, the performance of devices can be compromised under some operating conditions. From the device development point of view, device optimization is necessary to obtain the best possible performance. For device modeling and design purposes, the device needs to be characterized and modeled accurately in...
In this paper, we present an improved drain-source current (I-V) model for HEMT's which is simple and easy to extract, suitable for implementation in simulation tools. A single modeling equation is developed, allowing accurate prediction of both static and dynamic I-V characteristics. The model parameters can be extracted to match the measured data closely for a wide bias range without sacrificing...
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