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In this paper a 2 MW dc-dc converter is presented and design criteria are carried out. It deals with the preliminary design for the hardware implementation. The power supply shall have multiple targets such as an PV emulator or supply for a dc-micro grid in the research facility National Center for Reliable Electric Power Transmission of the University of Arkansas. The converter is designed for an...
Sigma-Delta Analog-to-Digital converter (ADC), is widely used in portable electronic products. An operational transconductance amplifier (OTA) is one of the most important components of this ADC. This paper reports a new design of low power fully differential OTA. In this design authors have used adaptive biasing technique and DC gain enhancement technique for improving design parameters as compared...
In this work, new design techniques that aim to reduce power consumption of true single-phase clock-based (TSPC) prescalers is presented. The structure of divide-by-4/5 frequency divider is simplified, and its performance is compared with previous work to demonstrate the improvement. Simulation results show at least a 25% reduction of power consumption is achieved by the proposed unit. In the 32/33...
A low-power high-resolution Delta-Sigma modulator for audio codec, designed in Global-Foundries BCD 0.18µm 1P4M CMOS process, is presented. The modulator employs a fourth-order single-loop feedforward topology with a 3bit-quantizer. A novel structure of Switched-Opamp (SO) utilizing current-starvation and Slew-Rate (SR) boosting is adopted to meet the requirements of high performance and fast settling...
This paper examines the fault ride-through strategy of a three-phase PV system with respect to compliance to the German Transmission Code. Specifically, the paper examines the case of a single line-ground fault which occurs predominantly in the distribution system. The paper proposes the injection of reactive power on a perphase basis to the faulty phases while maintaining active power injection to...
For sensor networks, the extension of operating time by controlling power consumption is an important research subject. In a receiver-driven communication protocol, a receiver node transmits its ID to the sender node periodically, and in response the sender node sends an acknowledgment. The average power consumption of the network can be controlled, but a part of the network shuts down when the battery...
A new frequency compensation technique for low-power, area-efficient multistage amplifiers is introduced in this work. By utilizing active capacitors to realize the compensation network in a nested way, two inverting gain stages can be used as the second and third gain-stages. The proposed scheme reaches better bandwidth-to-power and slew-rate-to-power performances comparing to the ever published...
This paper describes a comparative analysis between two topologies of operational amplifiers to design a 40 MS/s 12-bit pipeline analog to digital converter (ADC). The analysis includes AC and transient simulation to select the proper topology. This ADC is implemented in a 0.35 mum AMS CMOS technology with 3.3 V single power supply. The capacitors and selected operational amplifiers were scaled for...
Class D amplifiers are becoming the most feasible solution for embedded audio application. However, distortions due to the non-linear nature of switching stage are the main drawback for this amplifier topology. This paper discusses the design and implementation of high fidelity audio class D using sliding mode control scheme. This design method proves to be a cost effective solution for industrial...
Advances in micromachining technology can facilitate the integration of SAW (Surface Acoustic Wave) devices and CMOS circuitry on IC scale substrate for Monolithic fabrication. The optimal design and performance of these filters can be reached by using new Smart materials. The key component in the structure of the SAW device is the piezoelectric materials used which depends mainly on some important...
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