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Code injection attacks are an undeniable threat in today's cyberworld. Instruction Set Randomization (ISR) was initially proposed in 2003. This technique was designed to protect systems against code injection attacks by creating an unique instruction set for each machine, thanks to randomization. It is a promising technique in the growing embedded system and Internet of Things (IoT) devices ecosystem,...
This work targets to the technologies of the Internet of Things (IoT), regarding to security and trusted devices. It provides to the readers a comprehensive understanding of both security and privacy aspects. Modern systems and networks are quoted, in order to cover any questions arising from the theoretical approach. Hardware integration devices are also presented, for flexible implementations for...
The Advanced Encryption Standard (AES) became the standard for encryption to protect the sensitive information. With the increasing use of portable and wireless devices and demanding information security needs in embedded systems, prompted efforts to find fast software based implementation of AES encryption/decryption capable of running on resource constrained environment in terms of processor speed,...
Embedded systems empower many products and are used in a variety of applications ranging from smart homes to modern cars. Respective technologies enable new functional features and at the same time improve also non-functional aspects like environmental efficiency. Especially, their inter-connection and coupling with existing networks – in particular to the Internet – allow for an unprecedented boost...
Securing data transfer is a primary need for all embedded systems. The AES-ECC hybrid cryptosystem combines advantages of the Advanced Encryption Standard (AES) to accelerate data encryption and the Elliptic Curve Cryptography (ECC) to secure the exchange of symmetric session key. In this paper, we present an improved AES-ECC system using a co-design approach where AES runs on NIOS II softcore and...
In this paper, we propose a dynamically run-time reconfigurable power aware cryptographic processor for secure autonomous encryption. The design proposes the implementation of a dynamically reconfigurable AES cryptography process on an FPGA. The proposed design encompasses a microarchitecture which is variously power, latency, and throughput optimized via hardware acceleration and partial reconfiguration...
Binary extension field F2 8 is recently used for AES encryption and IoT (Internet of Things) security with PUF (Physical Unclonable Function). The calculations over tower field such as F(2 4)2 or F((2 2)2)2 become more efficient than that of over F28. This paper focuses on the efficient calculations over F(2 4)2.
Devices connected to the internet are increasingly the targets of deliberate and sophisticated attacks [1]. Embedded system engineers tend to focus on well-defined functional capabilities rather than “obscure” security and resilience. However, “after-the-fact” system hardening could be prohibitively expensive or even impossible. The co-design of security and resilience with functionality has to overcome...
The integration of fully homomorphic encryption (FHE) into embedded systems is limited due to its huge computational requirements. FHE requires multiplications of operands up to millions of bits. Current implementations use high-end and parallel processors, leading to high-power consumption. We propose a hardware-software system to benefit from the best of hardware (performance/low-power) and software...
Embedded systems (ES) become available anywhere and anytime as an established part of our daily routine. Developers of these systems face significant challenges in code and information security. Whereas, software tampering is one of these challenges, code integrity detection is one of the main approaches used to defeat it. Checking code integrity achieves tamper proofing by method of identification...
In this paper, we investigate the hardware implementation of four different, but similar, lightweight block ciphers: PRESENT, Piccolo, PRINTcipher and LED. The purpose of this paper is to present a common platform which integrates these four ciphers into one system using a shared datapath, with the objective of reducing the area below the total sum of area consumed by the individual ciphers. The structure...
Embedded systems of today are being designed to be highly reliable, to respond to real-time system demands, to have functional flexibility and most importantly to run on low power sources. These ubiquitous systems are nowadays being employed to handle highly sensitive data including global positioning, health, banking and personal data. Based on these trends, the demands on their security mechanism...
We present an efficient hardware implementation of a quasigroup block cipher system. Power and resource comparisons are done with AES and we show that the proposed quasigroup system provides an inexpensive alternative for SCADA networks and other low powered, resource constrained devices.
Advanced Encryption Standard (AES) is one of the most widely used cryptographic algorithms in embedded systems, and is deployed in smart cards, mobile phones and wireless applications. Researchers have found various techniques to attack the encrypted data or the secret key using Side Channel information (execution time, power variations, electro migration, sound, etc.). Power analysis attack is most...
Intellectual Property protection on FPGAs is a major challenge for FPGA manufacturers. Adding security features to the FPGA is not difficult but there is no consistency among the different manufacturers. Meanwhile, more features will increase resource costs and product prices, forcing users to pay for all these features even if they do not use them. As a result, decoders are often not integrated inside...
Algorithmic parameterization and hardware architectures can ensure secure transmission of multimedia data in resource-constrained environments such as wireless video surveillance networks, telemedicine frameworks for distant health care support in rural areas, and Internet video streaming. Joint multimedia compression and encryption techniques can significantly reduce the computational requirements...
Small embedded systems, such as using a 16-bit CPU, are required to connect to the Internet. In addition, the systems are required to support encrypted communication. We develop a ubiquitous platform which supports Internet Protocol version 6 (IPv6) and IP Security (IPSec). This paper describes realization of Advanced Encryption Standard (AES) processing controlled by an original compact CPU core...
The ICmetrics technology is concerned with identifying acceptable features in an electronic system's operation for encryption purposes. Ideally, the nature of the features should be identical for all of the systems considered, while the values of these features should allow for unique identification of each of the systems. This paper looks at the properties of the Program Counter of a processor core...
1Time to market becomes a critical constraint in the context of increase in size and complexity of embedded system design. The paper presents a methodology for the interface of any custom hardware with the system designed around a soft core processor through general purpose input and output (GPIO). The custom hardware under consideration is Advanced Encryption Standard Algorithm (AES). An ‘AES,’ is...
The paper builds the trusted, bottom-up and flexible security framework of embedded system, by taking advantage of the TCM hardware security, using the self-developed embedded secure operating systems, basing on flexibility of embedded systems software and hardware, with studying of the dynamic trust chain model of DRTM and key security technology. The paper proposes a way to effectively prevent the...
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