A built in Pseudo-Random sequence testing for testing embedded switched-current filters is described in this paper. The generation approach of Pseudo-Random sequence and the match for z functions of switched-current filters is analyzed and calculated. Taking into account of the connection between special structural problems and CMOS’s parameters in switched current circuits such as the drain-gate capacitance C dg , gate-source capacitance C gs and transconductance g m., a integrated fault model for testing is constituted. A 6-order switched-current low-pass filter has been tested based on catastrophic and parametric fault models. The technique does not intrude into the actual design of the switched-current blocks, Pseudo-Random sequence generated from existing digital hardware and analogue output pins are not required.