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In this paper, a compact model for the gate current in HKMG nMOS transistors is presented. The carrier transport through the multi-stack gate dielectrics of HKMG MOS transistors is shown to be dominated by the Trap Assisted Tunneling and Poole-Frenkel conduction mechanisms. Both these mechanisms occur simultaneously and each is dominant in a particular gate voltage range. The interdependence and simultaneity...
A small amount of slow trap density in Ge gate stacks is a crucial issue for Ge CMOS, in addition to thin equivalent oxide thickness and low interface state density. In this paper, we study the slow trap position and the generation mechanism in the high-k/GeOx/Ge interfaces fabricated by plasma oxidation. The slow trap density in Al2O3/GeOx/Ge interfaces by plasma pre-oxidation is compared with different...
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