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The breakdown path which leads to the soft- and hard-breakdown in a MOSFET device can be identified from the experiment. It carries similar concept of the filament formation in RRAM device. Basically, RTN traps in the dielectric layers can be labeled as a pointer to trace the breakdown path, i.e., from the leakage by measuring the transistor's Ig current as a function of time. In CMOS, these traps...
This work reviews a process that was developed to enhance the interface state density of a Ge/High-k interface. A slot plane antenna plasma oxidation (SPAO) process was implemented during dielectric deposition steps to fabricate TiN/ZrO2/Al2O3/p-Ge MOS gate stacks. A poor interface was observed with SPAO being performed before Al2O3/ZrO2 gate stack deposition because of fragmented GeOX interfacial...
In this work, a modeling method is developed so that one can investigate the Electromagnetic Emission (EME) of different interconnection layouts in integrated circuit through simulation. We examine the near field EME from different interconnect layouts for input signal of various frequencies and amplitude of 1V, and we found that the layout indeed affects the EME performances of an integrated circuit...
Pentacene organic thin-film transistor (OTFT) using Pd as gate electrode is proposed, with high-k LaZrO as gate dielectric. The Pd film is prepared by e-beam evaporation and then the LaZrO film is deposited by reactive sputtering in Ar/O2 ambience followed by an annealing in N2 at 400 °C. The OTFT achieves an obvious increase in carrier mobility (to 1.02 cm2/V·s), as compared with its counterpart...
We report the characteristics of HfO2/Al2O3 gate dielectric nanometer-stacks deposited on InAlAs at 245 °C by atomic layer deposition. The annealing effect on the interface and electrical properties of stack films was investigated by X-ray photoelectron spectroscopy, and electrical measurements. It is demonstrated that the resultant of As2O3 during annealing is suppressed by Al2O3 layer. The annealed...
A novel high-voltage trench SOI LDMOS with ultra-low specific on-resistance (Ron,sp) is proposed and it features a Trench-Field-Enhanced (TFE) structure around the deep trench dielectric layer. The TFE structure consists of an L-shaped p-region, a symmetrical-L-shaped n-region and two high-doping p+ regions. In the OFF state, as the trench-field-enhanced effect (TFE-E), electric field in the bulk...
Density functional theory (DFT) calculations are performed to investigate the hydrogen-related oxygen vacancy defects in HfO2 gate dielectrics. The results demonstrate that the introduction of the hydrogen atom has less effect on micro-structure of the HfO2 oxygen vacancy defects. And the new hydrogen-related defects have good thermal stability. The stability of different hydrogen-related structures,...
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