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Memristive devices are promising candidates for future high-density, power-efficient memories. The sneak path problem of purely-resistive crossbars and the inherent nanowire voltage drop, however, prevent the use of memristors in large-scale memory systems. In this paper we provide a simple yet flexible 3D memory organization and decoding scheme for memristive crossbars that exploits the benefits...
With integration density on-chip rocketing up, leakage power dominates the whole power budget of contemporary CMOS technology based memory, especially for SRAM based on-chip cache. To overcome the aggravating “power wall” issue, some emerging memory technologies such as STT-MRAM (Spin transfer torque magnetic RAM), PCRAM (Phase change RAM), and ReRAM(Resistive RAM) are proposed as promising candidates...
The increased capacity of multi-level cells (MLC) in emerging nonvolatile memory (NVM) technologies comes at the cost of higher cell write energies and lower cell endurance. In this paper, we describe MFNW, a Flip-N-Write encoding solution that effectively reduces the average write energy and improves endurance of MLC NVMs. Two MFNW modes are proposed and analyzed: cell Hamming distance (CHD) mode...
Zinc Oxide (ZnO) has emerged as an intriguing material for environmental gas sensing. While many applications of ZnO thin films for gas sensing have been used, this paper proposes a novel technique in which ZnO thin films are patterned to form a lossy frequency selective surface (FSS). When the resistance of the ZnO changes with exposure to gas, there is a change in the amplitude and resonant frequency...
In this paper, fundamental limits of injection of spin-polarized electrons in a non-magnetic material via optical pumping is investigated. Unlike electrical spin injection which can be used for injecting spins into either metallic or semiconducting non-magnets, optical spin pumping is restricted to non-magnets that have a bandgap (e.g. GaAs). Physical models of energy dissipation for both optical...
Aiming at achieving brain-like capabilities and efficiencies with nano-scale integration, this paper proposes a new scaling concept for wave-based neuromorphic devices. Our scaling approach shows that vg the group velocity of a signaling wave is one of the essential parameters that can account for the orders-of-magnitude gaps in the efficiency of the human brain and VLSIs for cognitive tasks.
Probabilistic machine intelligence paradigms such as Bayesian Networks (BNs) are widely used in critical real-world applications. However they cannot be employed efficiently for large problems on conventional computing systems due to inefficiencies resulting from layers of abstraction and separation of logic and memory. We present an unconventional nanoscale magneto-electric machine paradigm, architected...
Spintronic devices, such as magnetic tunnel junction (MTJ), are under intense investigation to overcome the increasing power issues of modern computing system, especially as technology node scales below 45 nm. MTJ is one of the most promising candidates for the next generation memory and logic chips thanks to its non-volatility, fast access speed, high endurance and easy 3-D integration with CMOS...
Advances in materials science have led to physical instantiations of self-assembled networks of memristive devices and demonstrations of their computational capability through reservoir computing. Reservoir computing is an approach that takes advantage of collective system dynamics for real-time computing. A dynamical system, called a reservoir, is excited with a time-varying signal and observations...
In energy harvesting applications, a power supply generated from a renewable power source is unstable that may induce a sudden power outage, losing data being processed. This paper introduces a sudden power-outage resilient nonvolatile microprocessor based on a flashback architecture for immediate system recovery, where nonvolatile storage elements, called magnetic-tunnel-junction (MTJ), are exploited...
In this paper, we present an improved design flow for nanoelectromechanical (NEM) relay-based combinational logic circuits. Six-terminal NEM relays can be programmed to act as 2-to-1 multiplexers. We can therefore use NEM relays to implement arbitrary combinational logic circuits. Previously, traditional logic synthesis techniques based on Binary Decision Diagrams (BDDs) have been used to map arbitrary...
In this paper we propose a novel Content Addressable Memory (CAM) cell, NEMsCAM, based on both Nano-electro-mechanical (NEM) switches and CMOS technologies. The memory component of the proposed CAM cell is designed with two complementary non-volatile NEM switches and located on top of the CMOS-based comparison component. As a use case for the NEMsCAM cell, we design first-level data and instruction...
Today's computing systems suffer from memory/communication bottleneck, resulting in energy and performance inefficiency. This makes them incapable to solve dataintensive applications within economically acceptable limits. Computation-In-Memory (CIM) architecture, based on the integration of storage and computation in the same physical location using non-volatile memristor technology offers a potential...
This paper proposes a new FinFET based SRAM cell and a cache architecture that efficiently exploits our SRAM cell for low-power and robust memory design. Our cache architecture uses invert coding scheme to encode the input data of a word line by taking into account the data composition. Based on the new data distribution, we propose two new asymmetric SRAM cells (AABG and ADWL) utilizing adaptive...
We discuss a new approach to computing that retains the possibility of exponential growth while making substantial use of the existing technology. The exponential improvement path of Moore's Law has been the driver behind the computing approach of Turing, von Neumann, and FORTRAN-like languages. Performance growth is slowing at the system level, even though further exponential growth should be possible...
This study proposes a technique for programming a dense memristor crossbar array without isolation transistors (0T1M) in order to achieve ex-situ training of a neural network. Programming memristors to a specific resistance level requires an iterative process needing the reading of individual memristor resistances due to memristor device stochasticity. This paper presents a circuit to read individual...
In this paper, defect tolerance performance of switching nano-crossbar arrays is extensively studied. Three types of nanoarrays where each crosspoint behaves as a diode, FET, and four-terminal switch, are considered. For each crosspoint, both stuck-open and stuck-closed defect probabilities are independently taken into consideration. A fast heuristic algorithm using indexing and mapping techniques...
Resistive Memory is a promising candidate to several applications. However, is prone to high defects due to the nanoscale fabrication uncertainties. Test time of traditional testing techniques is dominated by writes which are slower than reads. Fast March tests for defects in resistive memory are proposed in this paper. Test application time is reduced by approximately 96% when compared to existing...
Most brain-like computing systems build up from neural networks. While there are some essential problems with this approach, it is well-known that the brain functionally operates as an associative memory. Building associative memories using conventional CMOS technology has already been performed, but this approach suffers from a lack of scalability and information density. Additionally, for a long...
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