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A 77GHz CMOS 4-channels receiver, transmitter with 3-outputs and array antenna architecture is proposed for low cost/small size automotive radar system, and implemented by using 65nm CMOS and LTCC substrate respectively. Measured performance of CMOS transceiver, which included useful functions such as dual operation of long/short range detection, I/Q signal process and gain attenuation when near target...
A 60 GHz LTCC Antenna in Package with low power CMOS Radio solution for high data-rate and short-range wireless mobile communication are presented in this paper. For low power consumption, a new type of OOK system is proposed. The 60 GHz OOK transmitter and receiver are designed in 90 nm CMOS process. The transmitter with an OOK modulator and a VCO added an output buffer consumes 27.32 mW power and...
This paper reports the development of K-band wide-IF-band CMOS mixer with LO multiplier suitable for wideband applications. To achieve such broad bandwidth, several design techniques — such as current-reuse differential-pair with LC resonance circuit, and simultaneous in-band gain peaking and off-band gain tailoring — have been analyzed and employed. The on-wafer measurement of this 17.4–26.1GHz TSMC...
The design of a fully integrated 0.18-μm SiGe BiCMOS up-conversion mixer in K-band is presented. The mixer consists of a single-ended-to-differential active balun, double-balanced Gilber mixer cell, differential amplifier and band pass filter. The input active balun is used to facilitate on-wafer characterization from a single-ended IF signal. With an LO power of −2 dBm, the mixer exhibits a conversion...
In order to extend the communication range of the 60-GHz band broadband communication system, beam forming technology has been introduced. Due to the relatively high insertion loss and high phase/amplitude errors of 60-GHz band radio frequency (RF) phase shifter, broadband base band (BB) phase shifter has been focused. In this paper, we have developed a beam forming CMOS receiver RF integrated circuits...
This manuscript details our latest 90nm CMOS W-band receiver design where the RF LNA, resistive mixer, IF differential amplifier and LO tripler have been integrated, thus allows the whole 77–110GHz spectrum to be down-converted into quasi-DC −33GHz using a much lower microwave frequency. In addition to being used in our broadband receiver array project, this W-band circuit is also eligible for the...
We have developed a 79 GHz CMOS power amplifier (PA) with temperature compensation implemented using 40 nm CMOS technology that suppresses the variation of small-signal gain and the degradation of linearity within 0.8 dB in the temperature range from 0 to 100°C. The PA consists of an on-chip temperature sensor and four-stage common-source NMOS amplifiers. The temperature-compensated PA operating at...
A 24/35-GHz BiCMOS concurrent dual-band low-noise amplifier (DBLNA) has been developed. The proposed concurrent DBLNA was designed using new active notch filters embedded into a wideband LNA. The concurrent DBLNA has measured peak gains of 21.9/16.6 dB at 23.5/35.7 GHz, respectively. The measured 3-dB bandwidths of the low and high pass-bands are 7.7 GHz (18.8–26.5 GHz) and 8.8 GHz (32.8–41.6 GHz),...
A novel LC-VCO IC is proposed to achieve low-voltage low-power operation even at a supply voltage below the threshold voltage. The LC-VCO consists of a VCO circuit, a power detector circuit and a comparator circuit. A feedback loop consisting of the power detector and the comparator can control the bias condition of the VCO. The LC-VCO IC has been designed, fabricated and fully evaluated using 65...
A 135GHz CMOS wideband amplifier is proposed with high power efficiency to achieve a high-speed D-band wireless receiver. The proposed amplifier was fabricated with standard 1P12M 40nm CMOS technology. From measurement, the peak gain is 25dB with the power consumption was 140mW with a supply voltage of 1.1V. The amplifier achieved figure of merits of 25fJ. As a result, the performance characteristics...
Fully integrated millimeter-wave transceiver ICs using 65nm CMOS technology and on-board antenna for highspeed/short-range wireless communication system are described. To realize high-speed and low power consumption for a mobile application, a simple transceiver architecture with non-coherent amplitude shift keying (ASK) modulation method is adopted. The transceiver ICs are flip-chip bonded on boards...
This paper presents, for the first time, the realization of CMOS power divider with variable dividing ratio. Size reduction is attained by the adoption of lumped-LC networks based on on-chip capacitors and integrated differential transformers. The proposed design offers a tuning range of about 9dB with standard CMOS tuning diodes and low control voltage. For demonstration, both simulated and measured...
This paper presents a fully integrated triple-band CMOS class-E power amplifier (PA) for WCDMA (1.9 GHz) and LTE (1.8 GHz and 2.6 GHz) applications. The triple-band operation is achieved by activating selectively transistor cells and matching the transistor cells with low/high-band on-chip transformers for the three different frequencies. The PA is fabricated using a 0.18-μm CMOS process and has a...
An integrated chain composed of an 195-GHz oscillator with frequency doubled output at ∼390 GHz followed by two cascaded ÷2 injection locked frequency dividers with output frequency of ∼49 GHz is demonstrated in 45-nm CMOS. The peak power radiated at ∼390 GHz by an on-chip antenna is ∼2 μW. This work indicates it is possible to phase-lock submillimeter wave signals in CMOS. Polysilicon Gate separated...
A K-band, 24 GHz, fully integrated transformer power amplifier (PA) is designed and fabricated in the standard 0.18-μm deep N-well (DNW) CMOS technology. This power amplifier is a 2-stage design using cascode RF NMOS configuration. The on-chip transformers are adopted for the power combining and impedance transformation for the matching network with a small size. The measurement results of this PA...
This paper presents an improved gm-boosted techniques for a K-band cascode Colpitts voltage controlled oscillator (VCO). This modified topology is derivative from conventional gm-boosted technique by using cascoded cross-coupled pairs. By a quantitative small signal analysis, the gm-boosted cascode Colpitts VCO increases its transconductance more than a factor of 0.5[1+(gm1/gm3)(1+C1/C2)]. A K-band...
This work presents the design of a wideband highly linear variable gain amplifier (VGA). The proposed VGA consists of 3 stage digitally gain controlled amplifiers and a fixed gain amplifier. The circuit topologies of the amplifiers are pseudo differential inverter, which allows maximum headroom voltage swing. As a result, highly linear operation is achieved. A simple digitally gain controlled method...
This paper presents a 0.18 μm CMOS resistive double-balanced mixer using bulk-driven method with −1.3 dBm pumping power of local oscillator (LO), for 5.8 GHz dedicated short range communications (DSRC) applications. The LO signal is applied to the bulk and the source terminals differentially to reduce the required LO power without needs of impedance matching. The on-chip central-taped transformers...
This work presents a 5-GHz power amplifier (PA) based on a tsmc 0.18-μm CMOS process. A high quality factor (Q) transformer for use by the PA was fabricated using wafer-level integrated passive device (IPD) technology and stacked on top of the active region of the CMOS PA chip. PAs with and without the IPD transformer were designed and their performance was compared. For a 1.8-V supply voltage, the...
A 77 GHz CMOS medium power amplifier (PA) with high efficient matching networks based on transformer is presented. The unit transistor size of a power cell is selected by analyzing its maximum available gain. The broadside-coupled Transmission-Line Transformers (TLTs) are implemented as matching networks for low insertion loss and wide band matching characteristics. The PA is fabricated using a 65-nm...
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