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Welcome and An-nyung-ha-se-yo! The IEEE Photonics Society is pleased to announce the 10th International Conference on Group IV Photonics (GFP), to be held in Seoul, Korea, from 28th of August till the 30th.
The integration of photonic devices with electronic circuit using CMOScompatible process is presented in this paper. Issues and challenges in the design of process integration are discussed.
This study reports two types of Si epitaxial growth techniques, SPE and LEG, used for bulk-Si based optical interconnect. Experiments show that the LEG technology enhances both crystalline quality and epitaxial growth length.
Optical interconnect for a DDR3 DRAM device is verified at a 4∶1-serialized 1.6-Gbps data rate using a FPGA-based memory controller board and optical transceiver chips with bulk-Si-based photonic die and electronic die co-packaged.
We present a 30 GHz silicon photonic platform that includes low-loss passive components as well as high-speed modulators and photodetectors. The platform is available to the community as part of the OpSIS-IME MPW service.
We have investigated the performance of proposed multi-slot stack-type ring resonators. For biosensors, the sensitivity is roughly proportional to the number of slots. For optical modulators, the low operation voltage < 0.4 V is simulated.
We demonstrate an optical crossbar with fifth-order resonant switches. Repeatable and >100GHz bandwidth operation is measured for two rows of eight switches. “On” and “Off” state losses are measured to be 2.2dB and 0.9dB respectively.
A concept is proposed and realized for post-fabrication trimming as well as new structures fabrication on functionalized silicon platform. Electron beam bleaching of a chromophore doped polymer cladding is applied.
We propose and experimentally demonstrate an all-optical temporal ordinary-differential-equation (ODE) solver featuring compact footprint and high processing speed on a silicon-on-insulator platform. The device performance is theoretically studied and verified by 5-Gb/s ODE solving experiment.
We demonstrate high-quality (Q) factor grating-coupled silicon-on-sapphire ring resonators, operating around 4.5 µm. Total Q-factors of 151,000 and intrinsic Q-factors of 278,000 are measured, enabling applications in nonlinear wavelength generation and other areas.
We report an SOI based adiabatic splitter, with velocity and coupling tapered simultaneously. Output uniformity better than 0.2 dB is obtained in 100 nm wavelength range measured, with low excess loss about 0.3 dB.
We have demonstrated a low-insertion-loss 8-channel interleaved angled MMI CWDM structure on the SOI platform. It requires only a single-step lithography and etching for fabrication and has good tolerance to fabrication errors.
We report a compact 1×8 silicon Mux/DeMux with ring tuning efficiency of <3µW/GHz using back-side substrate removal technique. Total power of <4.1mW was measured to tune the device to a 1.6nm wavelength grid.
Devices fabricated on 4 µm thick SOI wafers are presented. They include a router based on AWGs and SOAs, a demultiplexer based on cascaded MZIs, ring resonators, and a novel concept of MMI resonator.
We experimentally demonstrate a second-order optical filter using a novel self-coupled optical waveguide (SCOW) resonance structure. The rejection band profile can be conveniently tailored by two pairs of phase shifters.
A compact all-silicon Mach-Zehnder interferometer (MZI) filter with temperature sensitivity less than 5pm/ K is demonstrated. The device achieves a reduced footprint by making use of different polarizations.
We studied the impact of the lithography mask grid on the performance of silicon AWGs, and show a dramatic improvement in crosstalk of 5dB when going from a 5nm to a 1nm grid.
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