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MOSFET compact models are integral parts in the process cycle of designing, simulating, verifying and fabricating integrated circuits. These are used for rapid calculation of transistor characteristics during circuit simulation. Compact MOSFET models should be simple, numerically fast, and accurate. Moreover, the models should be predictive and scalable over wide ranges of device parameters. In case...
The reliability of digital circuits is greatly distorted as the VLSI design cycle enters into nanoscale arena. In the past, the inputs of digital circuits were considered deterministic but shifting of transistor technology into nanoscale dimensions has made their behaviour totally probabilistic. The reason is that logic level voltages suffer from a number of fluctuations due to the effect of signal...
A low-power quaternary comparator circuit using current-mode CMOS multiple-valued logic (MVL) circuits has been presented in this paper. Existing MVL comparator circuits consume high power. The circuit presented in this paper has been shown low power digital output. It has been simulated with PSPICE using the transistor model parameter values of the BSIM3 NMOS model V3.2 for 0.13 μm CMOS process....
Scaling of CMOS technology is degrading the reliability of upcoming microelectronic devices. When the circuit design enters the nanoscale dimensions, the inputs have more influence on the circuit's reliability due to the circuit's internal noises and gate errors. In this paper, we will model the deterministic inputs probabilistically and analyze their effect on the reliability of digital circuits...
In this paper, a CNT-OPAMP has been designed using an eight-transistor OPAMP benchmark model and the performance of the OPAMP has been examined with the variation of the number of SWNTs used in the channel region of the CNTFETs. A simulation based assessment of the effect of increased nanotubes in the channel region is done, showing a gradual improvement in all the characteristic performance parameters...
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