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In this paper aspects of device simulation of digital elements have been reviewed. Theoretical and practical aspects of noise modeling in integrated circuits substrate have been discussed.
Power consumption regularities of the most perspective quasi-adiabatic base logic gates are investigated by method of computer modeling. The established laws a power consumption of the base logic gates allow to choose the compromise between power consumption and speed, optimize power characteristics of base gates. It's also allowed to predict their improvement at quality improvement of technology.
This paper consider possibility of building complex logic capacitor-transistor devices with using transistor in cap mode (with shorted source and drain) as cap element. Parameters deviations from theoretical values caused by real device influence are obtained with technology device modeling in ISE TCAD.
The influence of the location of p-well-n-well and n-well-p-substrate junctions and the well formation diffusion parameters on the double-well magnetotransistor magnetic sensitivity value was investigated by means of numerical modeling.
Bipolar magnetotransistor absolute magnetic sensitivity dependence on temperature in the range 200-370 K and for magnetic fields under 0.18 T was investigated. The possibility of temperature stabilization of sensitivity by input current control was shown.
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