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Super fast Monte-Carlo techniques are applied to allow deeper insight to the yield of SOI domino circuit design techniques for SRAMs. For the first time, Read-before-Write in dual supply domino bit-select design is analyzed in the presence of floating body effects, hysteretic and process variations. The methodology provides greater ability to alleviate non-functionality by identifying yield-optimized...
The improved immunity of FD SOI technology against short-channel effects has been shown to offer a great interest for subthreshold logic in terms of delay and energy per operation at medium throughputs (108 Op/s). Moreover, the combination of an undoped channel with a metal gate extends this benefit to lower throughputs by a reduction of the minimum functional Vdd and static energy. This makes FD...
We report the potential-based SOI-MOSFET model HiSIM-SOI, which solves the three surface potentials of the SOI-device accurately without sacrificing simulation time. The model implements the bias dependent dynamic depletion behavior, shifting between partially-depleted (PD) and fully-depleted (FD) conditions smoothly. It is also demonstrated that the floating-body effect can be accurately captured...
Accurate extraction of the SPICE model parameter is critical in the CMOS IC design. However, it faces difficult issues in state-of-the-art MOSFET technology. First, the gate CV parameter extraction is challenging due to small values and many extrinsic components that need to be de-embedded. Second, the systematic offset of the gate critical dimension (CD) exists between test structures and circuits,...
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